HHI_VIID_CLK_CNTL 3145 drivers/clk/meson/g12a.c 		.offset = HHI_VIID_CLK_CNTL,
HHI_VIID_CLK_CNTL 3236 drivers/clk/meson/g12a.c 		.offset = HHI_VIID_CLK_CNTL,
HHI_VIID_CLK_CNTL 3320 drivers/clk/meson/g12a.c 		.offset = HHI_VIID_CLK_CNTL,
HHI_VIID_CLK_CNTL 3334 drivers/clk/meson/g12a.c 		.offset = HHI_VIID_CLK_CNTL,
HHI_VIID_CLK_CNTL 3348 drivers/clk/meson/g12a.c 		.offset = HHI_VIID_CLK_CNTL,
HHI_VIID_CLK_CNTL 3362 drivers/clk/meson/g12a.c 		.offset = HHI_VIID_CLK_CNTL,
HHI_VIID_CLK_CNTL 3376 drivers/clk/meson/g12a.c 		.offset = HHI_VIID_CLK_CNTL,
HHI_VIID_CLK_CNTL 1843 drivers/clk/meson/gxbb.c 		.offset = HHI_VIID_CLK_CNTL,
HHI_VIID_CLK_CNTL 1939 drivers/clk/meson/gxbb.c 		.offset = HHI_VIID_CLK_CNTL,
HHI_VIID_CLK_CNTL 2023 drivers/clk/meson/gxbb.c 		.offset = HHI_VIID_CLK_CNTL,
HHI_VIID_CLK_CNTL 2037 drivers/clk/meson/gxbb.c 		.offset = HHI_VIID_CLK_CNTL,
HHI_VIID_CLK_CNTL 2051 drivers/clk/meson/gxbb.c 		.offset = HHI_VIID_CLK_CNTL,
HHI_VIID_CLK_CNTL 2065 drivers/clk/meson/gxbb.c 		.offset = HHI_VIID_CLK_CNTL,
HHI_VIID_CLK_CNTL 2079 drivers/clk/meson/gxbb.c 		.offset = HHI_VIID_CLK_CNTL,
HHI_VIID_CLK_CNTL 1346 drivers/clk/meson/meson8b.c 		.offset = HHI_VIID_CLK_CNTL,
HHI_VIID_CLK_CNTL  293 drivers/gpu/drm/meson/meson_vclk.c 	regmap_update_bits(priv->hhi, HHI_VIID_CLK_CNTL, VCLK2_EN, 0);
HHI_VIID_CLK_CNTL  304 drivers/gpu/drm/meson/meson_vclk.c 		regmap_update_bits(priv->hhi, HHI_VIID_CLK_CNTL,
HHI_VIID_CLK_CNTL  307 drivers/gpu/drm/meson/meson_vclk.c 		regmap_update_bits(priv->hhi, HHI_VIID_CLK_CNTL,
HHI_VIID_CLK_CNTL  311 drivers/gpu/drm/meson/meson_vclk.c 	regmap_update_bits(priv->hhi, HHI_VIID_CLK_CNTL, VCLK2_EN, VCLK2_EN);
HHI_VIID_CLK_CNTL  325 drivers/gpu/drm/meson/meson_vclk.c 	regmap_update_bits(priv->hhi, HHI_VIID_CLK_CNTL,
HHI_VIID_CLK_CNTL  329 drivers/gpu/drm/meson/meson_vclk.c 	regmap_update_bits(priv->hhi, HHI_VIID_CLK_CNTL,
HHI_VIID_CLK_CNTL  331 drivers/gpu/drm/meson/meson_vclk.c 	regmap_update_bits(priv->hhi, HHI_VIID_CLK_CNTL,