HDMI_WP_PWR_CTRL   31 drivers/gpu/drm/omapdrm/dss/hdmi_wp.c 	DUMPREG(HDMI_WP_PWR_CTRL);
HDMI_WP_PWR_CTRL   70 drivers/gpu/drm/omapdrm/dss/hdmi_wp.c 	if (REG_GET(wp->base, HDMI_WP_PWR_CTRL, 5, 4) == val)
HDMI_WP_PWR_CTRL   74 drivers/gpu/drm/omapdrm/dss/hdmi_wp.c 	REG_FLD_MOD(wp->base, HDMI_WP_PWR_CTRL, val, 7, 6);
HDMI_WP_PWR_CTRL   77 drivers/gpu/drm/omapdrm/dss/hdmi_wp.c 	if (hdmi_wait_for_bit_change(wp->base, HDMI_WP_PWR_CTRL, 5, 4, val)
HDMI_WP_PWR_CTRL   90 drivers/gpu/drm/omapdrm/dss/hdmi_wp.c 	REG_FLD_MOD(wp->base, HDMI_WP_PWR_CTRL, val, 3, 2);
HDMI_WP_PWR_CTRL   93 drivers/gpu/drm/omapdrm/dss/hdmi_wp.c 	if (hdmi_wait_for_bit_change(wp->base, HDMI_WP_PWR_CTRL, 1, 0, val)
HDMI_WP_PWR_CTRL   32 drivers/video/fbdev/omap2/omapfb/dss/hdmi_wp.c 	DUMPREG(HDMI_WP_PWR_CTRL);
HDMI_WP_PWR_CTRL   71 drivers/video/fbdev/omap2/omapfb/dss/hdmi_wp.c 	if (REG_GET(wp->base, HDMI_WP_PWR_CTRL, 5, 4) == val)
HDMI_WP_PWR_CTRL   75 drivers/video/fbdev/omap2/omapfb/dss/hdmi_wp.c 	REG_FLD_MOD(wp->base, HDMI_WP_PWR_CTRL, val, 7, 6);
HDMI_WP_PWR_CTRL   78 drivers/video/fbdev/omap2/omapfb/dss/hdmi_wp.c 	if (hdmi_wait_for_bit_change(wp->base, HDMI_WP_PWR_CTRL, 5, 4, val)
HDMI_WP_PWR_CTRL   91 drivers/video/fbdev/omap2/omapfb/dss/hdmi_wp.c 	REG_FLD_MOD(wp->base, HDMI_WP_PWR_CTRL, val, 3, 2);
HDMI_WP_PWR_CTRL   94 drivers/video/fbdev/omap2/omapfb/dss/hdmi_wp.c 	if (hdmi_wait_for_bit_change(wp->base, HDMI_WP_PWR_CTRL, 1, 0, val)