HDMI_READ 136 drivers/gpu/drm/gma500/oaktrail_hdmi.c HDMI_READ(HDMI_HCR); HDMI_READ 139 drivers/gpu/drm/gma500/oaktrail_hdmi.c HDMI_READ(0x51a8); HDMI_READ 142 drivers/gpu/drm/gma500/oaktrail_hdmi.c HDMI_READ(HDMI_AUDIO_CTRL); HDMI_READ 151 drivers/gpu/drm/gma500/oaktrail_hdmi.c HDMI_READ(0x51a8); HDMI_READ 154 drivers/gpu/drm/gma500/oaktrail_hdmi.c HDMI_READ(HDMI_AUDIO_CTRL); HDMI_READ 157 drivers/gpu/drm/gma500/oaktrail_hdmi.c HDMI_READ(HDMI_HCR); HDMI_READ 537 drivers/gpu/drm/gma500/oaktrail_hdmi.c temp = HDMI_READ(HDMI_HSR); HDMI_READ 81 drivers/gpu/drm/gma500/oaktrail_hdmi_i2c.c temp = HDMI_READ(HDMI_HICR); HDMI_READ 84 drivers/gpu/drm/gma500/oaktrail_hdmi_i2c.c HDMI_READ(HDMI_HICR); HDMI_READ 90 drivers/gpu/drm/gma500/oaktrail_hdmi_i2c.c HDMI_READ(HDMI_HICR); HDMI_READ 107 drivers/gpu/drm/gma500/oaktrail_hdmi_i2c.c HDMI_READ(HDMI_HI2CHCR); HDMI_READ 185 drivers/gpu/drm/gma500/oaktrail_hdmi_i2c.c temp = HDMI_READ(HDMI_HI2CRDB0 + (i * 4)); HDMI_READ 191 drivers/gpu/drm/gma500/oaktrail_hdmi_i2c.c temp = HDMI_READ(HDMI_HISR); HDMI_READ 193 drivers/gpu/drm/gma500/oaktrail_hdmi_i2c.c HDMI_READ(HDMI_HISR); HDMI_READ 196 drivers/gpu/drm/gma500/oaktrail_hdmi_i2c.c temp = HDMI_READ(HDMI_HI2CHCR); HDMI_READ 198 drivers/gpu/drm/gma500/oaktrail_hdmi_i2c.c HDMI_READ(HDMI_HI2CHCR); HDMI_READ 210 drivers/gpu/drm/gma500/oaktrail_hdmi_i2c.c temp = HDMI_READ(HDMI_HISR); HDMI_READ 212 drivers/gpu/drm/gma500/oaktrail_hdmi_i2c.c HDMI_READ(HDMI_HISR); HDMI_READ 215 drivers/gpu/drm/gma500/oaktrail_hdmi_i2c.c temp = HDMI_READ(HDMI_HI2CHCR); HDMI_READ 217 drivers/gpu/drm/gma500/oaktrail_hdmi_i2c.c HDMI_READ(HDMI_HI2CHCR); HDMI_READ 229 drivers/gpu/drm/gma500/oaktrail_hdmi_i2c.c stat = HDMI_READ(HDMI_HISR); HDMI_READ 233 drivers/gpu/drm/gma500/oaktrail_hdmi_i2c.c HDMI_READ(HDMI_HISR); HDMI_READ 213 drivers/gpu/drm/vc4/vc4_hdmi.c if (HDMI_READ(VC4_HDMI_HOTPLUG) & VC4_HDMI_HOTPLUG_CONNECTED) HDMI_READ 323 drivers/gpu/drm/vc4/vc4_hdmi.c HDMI_READ(VC4_HDMI_RAM_PACKET_CONFIG) & ~BIT(packet_id)); HDMI_READ 325 drivers/gpu/drm/vc4/vc4_hdmi.c return wait_for(!(HDMI_READ(VC4_HDMI_RAM_PACKET_STATUS) & HDMI_READ 340 drivers/gpu/drm/vc4/vc4_hdmi.c WARN_ONCE(!(HDMI_READ(VC4_HDMI_RAM_PACKET_CONFIG) & HDMI_READ 370 drivers/gpu/drm/vc4/vc4_hdmi.c HDMI_READ(VC4_HDMI_RAM_PACKET_CONFIG) | BIT(packet_id)); HDMI_READ 371 drivers/gpu/drm/vc4/vc4_hdmi.c ret = wait_for((HDMI_READ(VC4_HDMI_RAM_PACKET_STATUS) & HDMI_READ 541 drivers/gpu/drm/vc4/vc4_hdmi.c HDMI_READ(VC4_HDMI_SCHEDULER_CONTROL) | HDMI_READ 625 drivers/gpu/drm/vc4/vc4_hdmi.c HDMI_READ(VC4_HDMI_SCHEDULER_CONTROL) | HDMI_READ 628 drivers/gpu/drm/vc4/vc4_hdmi.c ret = wait_for(HDMI_READ(VC4_HDMI_SCHEDULER_CONTROL) & HDMI_READ 634 drivers/gpu/drm/vc4/vc4_hdmi.c HDMI_READ(VC4_HDMI_RAM_PACKET_CONFIG) & HDMI_READ 637 drivers/gpu/drm/vc4/vc4_hdmi.c HDMI_READ(VC4_HDMI_SCHEDULER_CONTROL) & HDMI_READ 640 drivers/gpu/drm/vc4/vc4_hdmi.c ret = wait_for(!(HDMI_READ(VC4_HDMI_SCHEDULER_CONTROL) & HDMI_READ 649 drivers/gpu/drm/vc4/vc4_hdmi.c WARN_ON(!(HDMI_READ(VC4_HDMI_SCHEDULER_CONTROL) & HDMI_READ 652 drivers/gpu/drm/vc4/vc4_hdmi.c HDMI_READ(VC4_HDMI_SCHEDULER_CONTROL) | HDMI_READ 660 drivers/gpu/drm/vc4/vc4_hdmi.c drift = HDMI_READ(VC4_HDMI_FIFO_CTL); HDMI_READ 673 drivers/gpu/drm/vc4/vc4_hdmi.c ret = wait_for(HDMI_READ(VC4_HDMI_FIFO_CTL) & HDMI_READ 785 drivers/gpu/drm/vc4/vc4_hdmi.c if (!encoder->crtc || !(HDMI_READ(VC4_HDMI_RAM_PACKET_CONFIG) & HDMI_READ 919 drivers/gpu/drm/vc4/vc4_hdmi.c HDMI_READ(VC4_HDMI_TX_PHY_CTL0) & HDMI_READ 932 drivers/gpu/drm/vc4/vc4_hdmi.c HDMI_READ(VC4_HDMI_TX_PHY_CTL0) | HDMI_READ 1176 drivers/gpu/drm/vc4/vc4_hdmi.c u32 val = HDMI_READ(VC4_HDMI_CEC_RX_DATA_1 + i); HDMI_READ 1189 drivers/gpu/drm/vc4/vc4_hdmi.c u32 stat = HDMI_READ(VC4_HDMI_CPU_STATUS); HDMI_READ 1195 drivers/gpu/drm/vc4/vc4_hdmi.c cntrl1 = HDMI_READ(VC4_HDMI_CEC_CNTRL_1); HDMI_READ 1196 drivers/gpu/drm/vc4/vc4_hdmi.c cntrl5 = HDMI_READ(VC4_HDMI_CEC_CNTRL_5); HDMI_READ 1218 drivers/gpu/drm/vc4/vc4_hdmi.c u32 val = HDMI_READ(VC4_HDMI_CEC_CNTRL_5); HDMI_READ 1261 drivers/gpu/drm/vc4/vc4_hdmi.c (HDMI_READ(VC4_HDMI_CEC_CNTRL_1) & ~VC4_HDMI_CEC_ADDR_MASK) | HDMI_READ 1280 drivers/gpu/drm/vc4/vc4_hdmi.c val = HDMI_READ(VC4_HDMI_CEC_CNTRL_1); HDMI_READ 1431 drivers/gpu/drm/vc4/vc4_hdmi.c value = HDMI_READ(VC4_HDMI_CEC_CNTRL_1);