HDMI_CTRL_BASE     26 drivers/gpu/drm/exynos/regs-hdmi.h #define HDMI_INTC_CON			HDMI_CTRL_BASE(0x0000)
HDMI_CTRL_BASE     27 drivers/gpu/drm/exynos/regs-hdmi.h #define HDMI_INTC_FLAG			HDMI_CTRL_BASE(0x0004)
HDMI_CTRL_BASE     28 drivers/gpu/drm/exynos/regs-hdmi.h #define HDMI_HPD_STATUS			HDMI_CTRL_BASE(0x000C)
HDMI_CTRL_BASE     29 drivers/gpu/drm/exynos/regs-hdmi.h #define HDMI_V13_PHY_RSTOUT		HDMI_CTRL_BASE(0x0014)
HDMI_CTRL_BASE     30 drivers/gpu/drm/exynos/regs-hdmi.h #define HDMI_V13_PHY_VPLL		HDMI_CTRL_BASE(0x0018)
HDMI_CTRL_BASE     31 drivers/gpu/drm/exynos/regs-hdmi.h #define HDMI_V13_PHY_CMU		HDMI_CTRL_BASE(0x001C)
HDMI_CTRL_BASE     32 drivers/gpu/drm/exynos/regs-hdmi.h #define HDMI_V13_CORE_RSTOUT		HDMI_CTRL_BASE(0x0020)
HDMI_CTRL_BASE    158 drivers/gpu/drm/exynos/regs-hdmi.h #define HDMI_HDCP_KEY_LOAD		HDMI_CTRL_BASE(0x0008)
HDMI_CTRL_BASE    160 drivers/gpu/drm/exynos/regs-hdmi.h #define HDMI_INTC_CON_1			HDMI_CTRL_BASE(0x0010)
HDMI_CTRL_BASE    161 drivers/gpu/drm/exynos/regs-hdmi.h #define HDMI_INTC_FLAG_1		HDMI_CTRL_BASE(0x0014)
HDMI_CTRL_BASE    162 drivers/gpu/drm/exynos/regs-hdmi.h #define HDMI_PHY_STATUS_0		HDMI_CTRL_BASE(0x0020)
HDMI_CTRL_BASE    163 drivers/gpu/drm/exynos/regs-hdmi.h #define HDMI_PHY_STATUS_CMU		HDMI_CTRL_BASE(0x0024)
HDMI_CTRL_BASE    164 drivers/gpu/drm/exynos/regs-hdmi.h #define HDMI_PHY_STATUS_PLL		HDMI_CTRL_BASE(0x0028)
HDMI_CTRL_BASE    165 drivers/gpu/drm/exynos/regs-hdmi.h #define HDMI_PHY_CON_0			HDMI_CTRL_BASE(0x0030)
HDMI_CTRL_BASE    166 drivers/gpu/drm/exynos/regs-hdmi.h #define HDMI_HPD_CTRL			HDMI_CTRL_BASE(0x0040)
HDMI_CTRL_BASE    167 drivers/gpu/drm/exynos/regs-hdmi.h #define HDMI_HPD_ST			HDMI_CTRL_BASE(0x0044)
HDMI_CTRL_BASE    168 drivers/gpu/drm/exynos/regs-hdmi.h #define HDMI_HPD_TH_X			HDMI_CTRL_BASE(0x0050)
HDMI_CTRL_BASE    169 drivers/gpu/drm/exynos/regs-hdmi.h #define HDMI_AUDIO_CLKSEL		HDMI_CTRL_BASE(0x0070)
HDMI_CTRL_BASE    170 drivers/gpu/drm/exynos/regs-hdmi.h #define HDMI_V14_PHY_RSTOUT		HDMI_CTRL_BASE(0x0074)
HDMI_CTRL_BASE    171 drivers/gpu/drm/exynos/regs-hdmi.h #define HDMI_PHY_VPLL			HDMI_CTRL_BASE(0x0078)
HDMI_CTRL_BASE    172 drivers/gpu/drm/exynos/regs-hdmi.h #define HDMI_PHY_CMU			HDMI_CTRL_BASE(0x007C)
HDMI_CTRL_BASE    173 drivers/gpu/drm/exynos/regs-hdmi.h #define HDMI_CORE_RSTOUT		HDMI_CTRL_BASE(0x0080)