HDMI_CONTROL 1596 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c tmp = REG_SET_FIELD(tmp, HDMI_CONTROL, HDMI_DEEP_COLOR_ENABLE, 0); HDMI_CONTROL 1597 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c tmp = REG_SET_FIELD(tmp, HDMI_CONTROL, HDMI_DEEP_COLOR_DEPTH, 0); HDMI_CONTROL 1602 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c tmp = REG_SET_FIELD(tmp, HDMI_CONTROL, HDMI_DEEP_COLOR_ENABLE, 1); HDMI_CONTROL 1603 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c tmp = REG_SET_FIELD(tmp, HDMI_CONTROL, HDMI_DEEP_COLOR_DEPTH, 1); HDMI_CONTROL 1608 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c tmp = REG_SET_FIELD(tmp, HDMI_CONTROL, HDMI_DEEP_COLOR_ENABLE, 1); HDMI_CONTROL 1609 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c tmp = REG_SET_FIELD(tmp, HDMI_CONTROL, HDMI_DEEP_COLOR_DEPTH, 2); HDMI_CONTROL 1638 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c tmp = REG_SET_FIELD(tmp, HDMI_CONTROL, HDMI_DEEP_COLOR_ENABLE, 0); HDMI_CONTROL 1639 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c tmp = REG_SET_FIELD(tmp, HDMI_CONTROL, HDMI_DEEP_COLOR_DEPTH, 0); HDMI_CONTROL 1644 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c tmp = REG_SET_FIELD(tmp, HDMI_CONTROL, HDMI_DEEP_COLOR_ENABLE, 1); HDMI_CONTROL 1645 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c tmp = REG_SET_FIELD(tmp, HDMI_CONTROL, HDMI_DEEP_COLOR_DEPTH, 1); HDMI_CONTROL 1650 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c tmp = REG_SET_FIELD(tmp, HDMI_CONTROL, HDMI_DEEP_COLOR_ENABLE, 1); HDMI_CONTROL 1651 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c tmp = REG_SET_FIELD(tmp, HDMI_CONTROL, HDMI_DEEP_COLOR_DEPTH, 2); HDMI_CONTROL 575 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c REG_UPDATE_3(HDMI_CONTROL, HDMI_CONTROL 580 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c REG_UPDATE_5(HDMI_CONTROL, HDMI_CONTROL 590 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c REG_UPDATE(HDMI_CONTROL, HDMI_DEEP_COLOR_DEPTH, 0); HDMI_CONTROL 594 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c REG_UPDATE_2(HDMI_CONTROL, HDMI_CONTROL 598 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c REG_UPDATE_2(HDMI_CONTROL, HDMI_CONTROL 605 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c REG_UPDATE_2(HDMI_CONTROL, HDMI_CONTROL 609 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c REG_UPDATE_2(HDMI_CONTROL, HDMI_CONTROL 615 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c REG_UPDATE_2(HDMI_CONTROL, HDMI_CONTROL 629 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c REG_UPDATE_2(HDMI_CONTROL, HDMI_CONTROL 641 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c REG_UPDATE_2(HDMI_CONTROL, HDMI_CONTROL 1046 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c REG_UPDATE_5(HDMI_CONTROL, HDMI_CONTROL 1053 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c REG_UPDATE_3(HDMI_CONTROL, HDMI_CONTROL 68 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SRI(HDMI_CONTROL, DIG, id), \ HDMI_CONTROL 136 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(HDMI_CONTROL, HDMI_PACKET_GEN_VERSION, mask_sh),\ HDMI_CONTROL 137 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(HDMI_CONTROL, HDMI_KEEPOUT_MODE, mask_sh),\ HDMI_CONTROL 138 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(HDMI_CONTROL, HDMI_DEEP_COLOR_ENABLE, mask_sh),\ HDMI_CONTROL 139 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(HDMI_CONTROL, HDMI_DEEP_COLOR_DEPTH, mask_sh),\ HDMI_CONTROL 302 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(HDMI_CONTROL, HDMI_CLOCK_CHANNEL_RATE, mask_sh),\ HDMI_CONTROL 303 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(HDMI_CONTROL, HDMI_DATA_SCRAMBLE_EN, mask_sh),\ HDMI_CONTROL 312 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(HDMI_CONTROL, HDMI_CLOCK_CHANNEL_RATE, mask_sh),\ HDMI_CONTROL 313 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(HDMI_CONTROL, HDMI_DATA_SCRAMBLE_EN, mask_sh),\ HDMI_CONTROL 669 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h uint32_t HDMI_CONTROL; HDMI_CONTROL 515 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c REG_UPDATE_6(HDMI_CONTROL, HDMI_CONTROL 526 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c REG_UPDATE(HDMI_CONTROL, HDMI_DEEP_COLOR_DEPTH, 0); HDMI_CONTROL 530 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c REG_UPDATE_2(HDMI_CONTROL, HDMI_CONTROL 534 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c REG_UPDATE_2(HDMI_CONTROL, HDMI_CONTROL 541 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c REG_UPDATE_2(HDMI_CONTROL, HDMI_CONTROL 545 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c REG_UPDATE_2(HDMI_CONTROL, HDMI_CONTROL 551 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c REG_UPDATE_2(HDMI_CONTROL, HDMI_CONTROL 564 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c REG_UPDATE_2(HDMI_CONTROL, HDMI_CONTROL 576 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c REG_UPDATE_2(HDMI_CONTROL, HDMI_CONTROL 1012 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c REG_UPDATE_5(HDMI_CONTROL, HDMI_CONTROL 55 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SRI(HDMI_CONTROL, DIG, id), \ HDMI_CONTROL 138 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h uint32_t HDMI_CONTROL; HDMI_CONTROL 324 drivers/gpu/drm/radeon/evergreen_hdmi.c val = RREG32(HDMI_CONTROL + offset); HDMI_CONTROL 351 drivers/gpu/drm/radeon/evergreen_hdmi.c WREG32(HDMI_CONTROL + offset, val);