HDMI_CON7          72 drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c 	mtk_hdmi_phy_set_bits(hdmi_phy, HDMI_CON7, RG_HTPLL_AUTOK_EN);
HDMI_CON7         105 drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c 	mtk_hdmi_phy_clear_bits(hdmi_phy, HDMI_CON7, RG_HTPLL_AUTOK_EN);
HDMI_CON7         141 drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c 	mtk_hdmi_phy_mask(hdmi_phy, HDMI_CON7, (0x2 << RG_HTPLL_DIVEN),
HDMI_CON7         205 drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c 	mtk_hdmi_phy_set_bits(hdmi_phy, HDMI_CON7, RG_HTPLL_AUTOK_EN);
HDMI_CON7         235 drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c 	mtk_hdmi_phy_clear_bits(hdmi_phy, HDMI_CON7, RG_HTPLL_AUTOK_EN);