HDMI_CON0          79 drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c 	mtk_hdmi_phy_set_bits(hdmi_phy, HDMI_CON0, RG_HDMITX_EN_SLDO_MASK);
HDMI_CON0          82 drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c 	mtk_hdmi_phy_set_bits(hdmi_phy, HDMI_CON0, RG_HDMITX_EN_SER_MASK);
HDMI_CON0          83 drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c 	mtk_hdmi_phy_set_bits(hdmi_phy, HDMI_CON0, RG_HDMITX_EN_PRED_MASK);
HDMI_CON0          84 drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c 	mtk_hdmi_phy_set_bits(hdmi_phy, HDMI_CON0, RG_HDMITX_EN_DRV_MASK);
HDMI_CON0          93 drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c 	mtk_hdmi_phy_clear_bits(hdmi_phy, HDMI_CON0, RG_HDMITX_EN_DRV_MASK);
HDMI_CON0          94 drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c 	mtk_hdmi_phy_clear_bits(hdmi_phy, HDMI_CON0, RG_HDMITX_EN_PRED_MASK);
HDMI_CON0          95 drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c 	mtk_hdmi_phy_clear_bits(hdmi_phy, HDMI_CON0, RG_HDMITX_EN_SER_MASK);
HDMI_CON0          98 drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c 	mtk_hdmi_phy_clear_bits(hdmi_phy, HDMI_CON0, RG_HDMITX_EN_SLDO_MASK);
HDMI_CON0         153 drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c 	mtk_hdmi_phy_clear_bits(hdmi_phy, HDMI_CON0, RG_HDMITX_EN_IMP_MASK);
HDMI_CON0         157 drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c 	mtk_hdmi_phy_mask(hdmi_phy, HDMI_CON0, (0xa << RG_HDMITX_DRV_IBIAS),
HDMI_CON0         212 drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c 	mtk_hdmi_phy_set_bits(hdmi_phy, HDMI_CON0, RG_HDMITX_EN_SLDO_MASK);
HDMI_CON0         215 drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c 	mtk_hdmi_phy_set_bits(hdmi_phy, HDMI_CON0, RG_HDMITX_EN_SER_MASK);
HDMI_CON0         216 drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c 	mtk_hdmi_phy_set_bits(hdmi_phy, HDMI_CON0, RG_HDMITX_EN_PRED_MASK);
HDMI_CON0         217 drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c 	mtk_hdmi_phy_set_bits(hdmi_phy, HDMI_CON0, RG_HDMITX_EN_DRV_MASK);
HDMI_CON0         223 drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c 	mtk_hdmi_phy_clear_bits(hdmi_phy, HDMI_CON0, RG_HDMITX_EN_DRV_MASK);
HDMI_CON0         224 drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c 	mtk_hdmi_phy_clear_bits(hdmi_phy, HDMI_CON0, RG_HDMITX_EN_PRED_MASK);
HDMI_CON0         225 drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c 	mtk_hdmi_phy_clear_bits(hdmi_phy, HDMI_CON0, RG_HDMITX_EN_SER_MASK);
HDMI_CON0         228 drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c 	mtk_hdmi_phy_clear_bits(hdmi_phy, HDMI_CON0, RG_HDMITX_EN_SLDO_MASK);
HDMI_CON0         165 drivers/gpu/drm/mediatek/mtk_mt8173_hdmi_phy.c 	mtk_hdmi_phy_set_bits(hdmi_phy, HDMI_CON0, RG_HDMITX_PLL_POSDIV);
HDMI_CON0         169 drivers/gpu/drm/mediatek/mtk_mt8173_hdmi_phy.c 	mtk_hdmi_phy_set_bits(hdmi_phy, HDMI_CON0, RG_HDMITX_PLL_EN);
HDMI_CON0         186 drivers/gpu/drm/mediatek/mtk_mt8173_hdmi_phy.c 	mtk_hdmi_phy_clear_bits(hdmi_phy, HDMI_CON0, RG_HDMITX_PLL_EN);
HDMI_CON0         189 drivers/gpu/drm/mediatek/mtk_mt8173_hdmi_phy.c 	mtk_hdmi_phy_clear_bits(hdmi_phy, HDMI_CON0, RG_HDMITX_PLL_POSDIV);
HDMI_CON0         232 drivers/gpu/drm/mediatek/mtk_mt8173_hdmi_phy.c 	mtk_hdmi_phy_mask(hdmi_phy, HDMI_CON0,
HDMI_CON0         234 drivers/gpu/drm/mediatek/mtk_mt8173_hdmi_phy.c 	mtk_hdmi_phy_set_bits(hdmi_phy, HDMI_CON0, RG_HDMITX_PLL_POSDIV);
HDMI_CON0         235 drivers/gpu/drm/mediatek/mtk_mt8173_hdmi_phy.c 	mtk_hdmi_phy_mask(hdmi_phy, HDMI_CON0,
HDMI_CON0         240 drivers/gpu/drm/mediatek/mtk_mt8173_hdmi_phy.c 	mtk_hdmi_phy_mask(hdmi_phy, HDMI_CON0,
HDMI_CON0         245 drivers/gpu/drm/mediatek/mtk_mt8173_hdmi_phy.c 	mtk_hdmi_phy_mask(hdmi_phy, HDMI_CON0,