HDMI_CEC_RX_CONTROL   97 drivers/gpu/drm/omapdrm/dss/hdmi4_cec.c 		hdmi_write_reg(core->base, HDMI_CEC_RX_CONTROL, 1);
HDMI_CEC_RX_CONTROL   99 drivers/gpu/drm/omapdrm/dss/hdmi4_cec.c 		while (hdmi_read_reg(core->base, HDMI_CEC_RX_CONTROL) & 1)
HDMI_CEC_RX_CONTROL  156 drivers/gpu/drm/omapdrm/dss/hdmi4_cec.c 	hdmi_write_reg(core->base, HDMI_CEC_RX_CONTROL, 0x3);
HDMI_CEC_RX_CONTROL  159 drivers/gpu/drm/omapdrm/dss/hdmi4_cec.c 		temp = hdmi_read_reg(core->base, HDMI_CEC_RX_CONTROL);