HDMI_ACR_SOURCE  1656 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c 		tmp = REG_SET_FIELD(tmp, HDMI_ACR_PACKET_CONTROL, HDMI_ACR_SOURCE, 0);
HDMI_ACR_SOURCE  1659 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c 		tmp = REG_SET_FIELD(tmp, HDMI_ACR_PACKET_CONTROL, HDMI_ACR_SOURCE, 1);
HDMI_ACR_SOURCE  1698 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c 		tmp = REG_SET_FIELD(tmp, HDMI_ACR_PACKET_CONTROL, HDMI_ACR_SOURCE, 0);
HDMI_ACR_SOURCE  1701 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c 		tmp = REG_SET_FIELD(tmp, HDMI_ACR_PACKET_CONTROL, HDMI_ACR_SOURCE, 1);
HDMI_ACR_SOURCE  1402 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c 	tmp = REG_SET_FIELD(tmp, HDMI_ACR_PACKET_CONTROL, HDMI_ACR_SOURCE,
HDMI_ACR_SOURCE  1385 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c 			HDMI_ACR_SOURCE, 0,
HDMI_ACR_SOURCE   179 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	SE_SF(HDMI_ACR_PACKET_CONTROL, HDMI_ACR_SOURCE, mask_sh),\
HDMI_ACR_SOURCE   259 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	SE_SF(DIG0_HDMI_ACR_PACKET_CONTROL, HDMI_ACR_SOURCE, mask_sh),\
HDMI_ACR_SOURCE   455 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t HDMI_ACR_SOURCE;
HDMI_ACR_SOURCE   586 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint32_t HDMI_ACR_SOURCE;
HDMI_ACR_SOURCE  1320 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c 			HDMI_ACR_SOURCE, 0,
HDMI_ACR_SOURCE   231 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h 	SE_SF(DIG0_HDMI_ACR_PACKET_CONTROL, HDMI_ACR_SOURCE, mask_sh),\
HDMI_ACR_SOURCE   421 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h 	type HDMI_ACR_SOURCE;\
HDMI_ACR_SOURCE    84 drivers/gpu/drm/radeon/evergreen_hdmi.c 			HDMI_ACR_SOURCE |		/* select SW CTS value */