HCLK_VPU          836 drivers/clk/rockchip/clk-px30.c 	GATE(HCLK_VPU, "hclk_vpu", "hclk_vpu_pre", 0, PX30_CLKGATE_CON(4), 6, GFLAGS),
HCLK_VPU          631 drivers/clk/rockchip/clk-rk3228.c 	GATE(HCLK_VPU, "hclk_vpu", "hclk_vpu_pre", 0, RK2928_CLKGATE_CON(15), 1, GFLAGS),
HCLK_VPU          528 drivers/clk/rockchip/clk-rk3328.c 	GATE(HCLK_VPU, "hclk_vpu", "hclk_vpu_pre", CLK_SET_RATE_PARENT,
HCLK_VPU          257 drivers/clk/rockchip/clk-rv1108.c 	GATE(HCLK_VPU, "hclk_vpu", "hclk_rkvdec_pre", 0,
HCLK_VPU          166 include/dt-bindings/clock/rv1108-cru.h #define CLK_NR_CLKS			(HCLK_VPU + 1)
HCLK_VPU          166 scripts/dtc/include-prefixes/dt-bindings/clock/rv1108-cru.h #define CLK_NR_CLKS			(HCLK_VPU + 1)