HB_DDR_ECC_OPT     91 drivers/edac/highbank_mc_edac.c 	reg = readl(pdata->mc_err_base + HB_DDR_ECC_OPT);
HB_DDR_ECC_OPT     94 drivers/edac/highbank_mc_edac.c 	writel(reg, pdata->mc_err_base + HB_DDR_ECC_OPT);
HB_DDR_ECC_OPT    205 drivers/edac/highbank_mc_edac.c 	control = readl(drvdata->mc_err_base + HB_DDR_ECC_OPT) & 0x3;