AM33XX_CM_WKUP_MOD 108 arch/arm/mach-omap2/clockdomains33xx_data.c .cm_inst = AM33XX_CM_WKUP_MOD, AM33XX_CM_WKUP_MOD 116 arch/arm/mach-omap2/clockdomains33xx_data.c .cm_inst = AM33XX_CM_WKUP_MOD, AM33XX_CM_WKUP_MOD 124 arch/arm/mach-omap2/clockdomains33xx_data.c .cm_inst = AM33XX_CM_WKUP_MOD, AM33XX_CM_WKUP_MOD 200 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_WKUP_CLKSTCTRL AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x0000) AM33XX_CM_WKUP_MOD 202 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_WKUP_CONTROL_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x0004) AM33XX_CM_WKUP_MOD 204 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_WKUP_GPIO0_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x0008) AM33XX_CM_WKUP_MOD 206 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_WKUP_L4WKUP_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x000c) AM33XX_CM_WKUP_MOD 208 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_WKUP_TIMER0_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x0010) AM33XX_CM_WKUP_MOD 210 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_WKUP_DEBUGSS_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x0014) AM33XX_CM_WKUP_MOD 212 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_L3_AON_CLKSTCTRL AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x0018) AM33XX_CM_WKUP_MOD 214 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_AUTOIDLE_DPLL_MPU AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x001c) AM33XX_CM_WKUP_MOD 216 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_IDLEST_DPLL_MPU AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x0020) AM33XX_CM_WKUP_MOD 218 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_SSC_DELTAMSTEP_DPLL_MPU AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x0024) AM33XX_CM_WKUP_MOD 220 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_SSC_MODFREQDIV_DPLL_MPU AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x0028) AM33XX_CM_WKUP_MOD 222 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_CLKSEL_DPLL_MPU AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x002c) AM33XX_CM_WKUP_MOD 224 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_AUTOIDLE_DPLL_DDR AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x0030) AM33XX_CM_WKUP_MOD 226 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_IDLEST_DPLL_DDR AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x0034) AM33XX_CM_WKUP_MOD 228 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_SSC_DELTAMSTEP_DPLL_DDR AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x0038) AM33XX_CM_WKUP_MOD 230 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_SSC_MODFREQDIV_DPLL_DDR AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x003c) AM33XX_CM_WKUP_MOD 232 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_CLKSEL_DPLL_DDR AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x0040) AM33XX_CM_WKUP_MOD 234 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_AUTOIDLE_DPLL_DISP AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x0044) AM33XX_CM_WKUP_MOD 236 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_IDLEST_DPLL_DISP AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x0048) AM33XX_CM_WKUP_MOD 238 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_SSC_DELTAMSTEP_DPLL_DISP AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x004c) AM33XX_CM_WKUP_MOD 240 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_SSC_MODFREQDIV_DPLL_DISP AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x0050) AM33XX_CM_WKUP_MOD 242 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_CLKSEL_DPLL_DISP AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x0054) AM33XX_CM_WKUP_MOD 244 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_AUTOIDLE_DPLL_CORE AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x0058) AM33XX_CM_WKUP_MOD 246 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_IDLEST_DPLL_CORE AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x005c) AM33XX_CM_WKUP_MOD 248 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_SSC_DELTAMSTEP_DPLL_CORE AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x0060) AM33XX_CM_WKUP_MOD 250 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_SSC_MODFREQDIV_DPLL_CORE AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x0064) AM33XX_CM_WKUP_MOD 252 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_CLKSEL_DPLL_CORE AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x0068) AM33XX_CM_WKUP_MOD 254 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_AUTOIDLE_DPLL_PER AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x006c) AM33XX_CM_WKUP_MOD 256 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_IDLEST_DPLL_PER AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x0070) AM33XX_CM_WKUP_MOD 258 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_SSC_DELTAMSTEP_DPLL_PER AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x0074) AM33XX_CM_WKUP_MOD 260 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_SSC_MODFREQDIV_DPLL_PER AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x0078) AM33XX_CM_WKUP_MOD 262 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_CLKDCOLDO_DPLL_PER AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x007c) AM33XX_CM_WKUP_MOD 264 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_DIV_M4_DPLL_CORE AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x0080) AM33XX_CM_WKUP_MOD 266 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_DIV_M5_DPLL_CORE AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x0084) AM33XX_CM_WKUP_MOD 268 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_CLKMODE_DPLL_MPU AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x0088) AM33XX_CM_WKUP_MOD 270 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_CLKMODE_DPLL_PER AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x008c) AM33XX_CM_WKUP_MOD 272 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_CLKMODE_DPLL_CORE AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x0090) AM33XX_CM_WKUP_MOD 274 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_CLKMODE_DPLL_DDR AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x0094) AM33XX_CM_WKUP_MOD 276 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_CLKMODE_DPLL_DISP AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x0098) AM33XX_CM_WKUP_MOD 278 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_CLKSEL_DPLL_PERIPH AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x009c) AM33XX_CM_WKUP_MOD 280 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_DIV_M2_DPLL_DDR AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x00a0) AM33XX_CM_WKUP_MOD 282 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_DIV_M2_DPLL_DISP AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x00a4) AM33XX_CM_WKUP_MOD 284 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_DIV_M2_DPLL_MPU AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x00a8) AM33XX_CM_WKUP_MOD 286 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_DIV_M2_DPLL_PER AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x00ac) AM33XX_CM_WKUP_MOD 288 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_WKUP_WKUP_M3_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x00b0) AM33XX_CM_WKUP_MOD 290 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_WKUP_UART0_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x00b4) AM33XX_CM_WKUP_MOD 292 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_WKUP_I2C0_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x00b8) AM33XX_CM_WKUP_MOD 294 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_WKUP_ADC_TSC_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x00bc) AM33XX_CM_WKUP_MOD 296 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_WKUP_SMARTREFLEX0_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x00c0) AM33XX_CM_WKUP_MOD 298 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_WKUP_TIMER1_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x00c4) AM33XX_CM_WKUP_MOD 300 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_WKUP_SMARTREFLEX1_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x00c8) AM33XX_CM_WKUP_MOD 302 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_L4_WKUP_AON_CLKSTCTRL AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x00cc) AM33XX_CM_WKUP_MOD 304 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_WKUP_WDT0_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x00d0) AM33XX_CM_WKUP_MOD 306 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_WKUP_WDT1_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x00d4) AM33XX_CM_WKUP_MOD 308 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_DIV_M6_DPLL_CORE AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x00d8)