GT641XX_IRQ_BASE   10 arch/mips/include/asm/irq_gt641xx.h #ifndef GT641XX_IRQ_BASE
GT641XX_IRQ_BASE   14 arch/mips/include/asm/irq_gt641xx.h #define GT641XX_MEMORY_OUT_OF_RANGE_IRQ		(GT641XX_IRQ_BASE + 1)
GT641XX_IRQ_BASE   15 arch/mips/include/asm/irq_gt641xx.h #define GT641XX_DMA_OUT_OF_RANGE_IRQ		(GT641XX_IRQ_BASE + 2)
GT641XX_IRQ_BASE   16 arch/mips/include/asm/irq_gt641xx.h #define GT641XX_CPU_ACCESS_OUT_OF_RANGE_IRQ	(GT641XX_IRQ_BASE + 3)
GT641XX_IRQ_BASE   17 arch/mips/include/asm/irq_gt641xx.h #define GT641XX_DMA0_IRQ			(GT641XX_IRQ_BASE + 4)
GT641XX_IRQ_BASE   18 arch/mips/include/asm/irq_gt641xx.h #define GT641XX_DMA1_IRQ			(GT641XX_IRQ_BASE + 5)
GT641XX_IRQ_BASE   19 arch/mips/include/asm/irq_gt641xx.h #define GT641XX_DMA2_IRQ			(GT641XX_IRQ_BASE + 6)
GT641XX_IRQ_BASE   20 arch/mips/include/asm/irq_gt641xx.h #define GT641XX_DMA3_IRQ			(GT641XX_IRQ_BASE + 7)
GT641XX_IRQ_BASE   21 arch/mips/include/asm/irq_gt641xx.h #define GT641XX_TIMER0_IRQ			(GT641XX_IRQ_BASE + 8)
GT641XX_IRQ_BASE   22 arch/mips/include/asm/irq_gt641xx.h #define GT641XX_TIMER1_IRQ			(GT641XX_IRQ_BASE + 9)
GT641XX_IRQ_BASE   23 arch/mips/include/asm/irq_gt641xx.h #define GT641XX_TIMER2_IRQ			(GT641XX_IRQ_BASE + 10)
GT641XX_IRQ_BASE   24 arch/mips/include/asm/irq_gt641xx.h #define GT641XX_TIMER3_IRQ			(GT641XX_IRQ_BASE + 11)
GT641XX_IRQ_BASE   25 arch/mips/include/asm/irq_gt641xx.h #define GT641XX_PCI_0_MASTER_READ_ERROR_IRQ	(GT641XX_IRQ_BASE + 12)
GT641XX_IRQ_BASE   26 arch/mips/include/asm/irq_gt641xx.h #define GT641XX_PCI_0_SLAVE_WRITE_ERROR_IRQ	(GT641XX_IRQ_BASE + 13)
GT641XX_IRQ_BASE   27 arch/mips/include/asm/irq_gt641xx.h #define GT641XX_PCI_0_MASTER_WRITE_ERROR_IRQ	(GT641XX_IRQ_BASE + 14)
GT641XX_IRQ_BASE   28 arch/mips/include/asm/irq_gt641xx.h #define GT641XX_PCI_0_SLAVE_READ_ERROR_IRQ	(GT641XX_IRQ_BASE + 15)
GT641XX_IRQ_BASE   29 arch/mips/include/asm/irq_gt641xx.h #define GT641XX_PCI_0_ADDRESS_ERROR_IRQ		(GT641XX_IRQ_BASE + 16)
GT641XX_IRQ_BASE   30 arch/mips/include/asm/irq_gt641xx.h #define GT641XX_MEMORY_ERROR_IRQ		(GT641XX_IRQ_BASE + 17)
GT641XX_IRQ_BASE   31 arch/mips/include/asm/irq_gt641xx.h #define GT641XX_PCI_0_MASTER_ABORT_IRQ		(GT641XX_IRQ_BASE + 18)
GT641XX_IRQ_BASE   32 arch/mips/include/asm/irq_gt641xx.h #define GT641XX_PCI_0_TARGET_ABORT_IRQ		(GT641XX_IRQ_BASE + 19)
GT641XX_IRQ_BASE   33 arch/mips/include/asm/irq_gt641xx.h #define GT641XX_PCI_0_RETRY_TIMEOUT_IRQ		(GT641XX_IRQ_BASE + 20)
GT641XX_IRQ_BASE   34 arch/mips/include/asm/irq_gt641xx.h #define GT641XX_CPU_INT0_IRQ			(GT641XX_IRQ_BASE + 21)
GT641XX_IRQ_BASE   35 arch/mips/include/asm/irq_gt641xx.h #define GT641XX_CPU_INT1_IRQ			(GT641XX_IRQ_BASE + 22)
GT641XX_IRQ_BASE   36 arch/mips/include/asm/irq_gt641xx.h #define GT641XX_CPU_INT2_IRQ			(GT641XX_IRQ_BASE + 23)
GT641XX_IRQ_BASE   37 arch/mips/include/asm/irq_gt641xx.h #define GT641XX_CPU_INT3_IRQ			(GT641XX_IRQ_BASE + 24)
GT641XX_IRQ_BASE   38 arch/mips/include/asm/irq_gt641xx.h #define GT641XX_CPU_INT4_IRQ			(GT641XX_IRQ_BASE + 25)
GT641XX_IRQ_BASE   39 arch/mips/include/asm/irq_gt641xx.h #define GT641XX_PCI_INT0_IRQ			(GT641XX_IRQ_BASE + 26)
GT641XX_IRQ_BASE   40 arch/mips/include/asm/irq_gt641xx.h #define GT641XX_PCI_INT1_IRQ			(GT641XX_IRQ_BASE + 27)
GT641XX_IRQ_BASE   41 arch/mips/include/asm/irq_gt641xx.h #define GT641XX_PCI_INT2_IRQ			(GT641XX_IRQ_BASE + 28)
GT641XX_IRQ_BASE   42 arch/mips/include/asm/irq_gt641xx.h #define GT641XX_PCI_INT3_IRQ			(GT641XX_IRQ_BASE + 29)
GT641XX_IRQ_BASE   15 arch/mips/kernel/irq-gt641xx.c #define GT641XX_IRQ_TO_BIT(irq) (1U << (irq - GT641XX_IRQ_BASE))
GT641XX_IRQ_BASE   95 arch/mips/kernel/irq-gt641xx.c 			do_IRQ(GT641XX_IRQ_BASE + i);
GT641XX_IRQ_BASE  116 arch/mips/kernel/irq-gt641xx.c 		irq_set_chip_and_handler(GT641XX_IRQ_BASE + i,