GS_MIA_SHIFT       30 drivers/gpu/drm/i915/gt/uc/intel_guc_reg.h #define   GS_MIA_MASK			  (0x07 << GS_MIA_SHIFT)
GS_MIA_SHIFT       31 drivers/gpu/drm/i915/gt/uc/intel_guc_reg.h #define   GS_MIA_CORE_STATE		  (0x01 << GS_MIA_SHIFT)
GS_MIA_SHIFT       32 drivers/gpu/drm/i915/gt/uc/intel_guc_reg.h #define   GS_MIA_HALT_REQUESTED		  (0x02 << GS_MIA_SHIFT)
GS_MIA_SHIFT       33 drivers/gpu/drm/i915/gt/uc/intel_guc_reg.h #define   GS_MIA_ISR_ENTRY		  (0x04 << GS_MIA_SHIFT)
GS_MIA_SHIFT     1829 drivers/gpu/drm/i915/i915_debugfs.c 			   (tmp & GS_MIA_MASK) >> GS_MIA_SHIFT);