AM33XX_CM_PER_MOD 28 arch/arm/mach-omap2/clockdomains33xx_data.c .cm_inst = AM33XX_CM_PER_MOD, AM33XX_CM_PER_MOD 36 arch/arm/mach-omap2/clockdomains33xx_data.c .cm_inst = AM33XX_CM_PER_MOD, AM33XX_CM_PER_MOD 44 arch/arm/mach-omap2/clockdomains33xx_data.c .cm_inst = AM33XX_CM_PER_MOD, AM33XX_CM_PER_MOD 52 arch/arm/mach-omap2/clockdomains33xx_data.c .cm_inst = AM33XX_CM_PER_MOD, AM33XX_CM_PER_MOD 60 arch/arm/mach-omap2/clockdomains33xx_data.c .cm_inst = AM33XX_CM_PER_MOD, AM33XX_CM_PER_MOD 68 arch/arm/mach-omap2/clockdomains33xx_data.c .cm_inst = AM33XX_CM_PER_MOD, AM33XX_CM_PER_MOD 76 arch/arm/mach-omap2/clockdomains33xx_data.c .cm_inst = AM33XX_CM_PER_MOD, AM33XX_CM_PER_MOD 84 arch/arm/mach-omap2/clockdomains33xx_data.c .cm_inst = AM33XX_CM_PER_MOD, AM33XX_CM_PER_MOD 92 arch/arm/mach-omap2/clockdomains33xx_data.c .cm_inst = AM33XX_CM_PER_MOD, AM33XX_CM_PER_MOD 100 arch/arm/mach-omap2/clockdomains33xx_data.c .cm_inst = AM33XX_CM_PER_MOD, AM33XX_CM_PER_MOD 44 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_PER_L4LS_CLKSTCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x0000) AM33XX_CM_PER_MOD 46 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_PER_L3S_CLKSTCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x0004) AM33XX_CM_PER_MOD 48 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_PER_L4FW_CLKSTCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x0008) AM33XX_CM_PER_MOD 50 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_PER_L3_CLKSTCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x000c) AM33XX_CM_PER_MOD 52 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_PER_CPGMAC0_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x0014) AM33XX_CM_PER_MOD 54 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_PER_LCDC_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x0018) AM33XX_CM_PER_MOD 56 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_PER_USB0_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x001c) AM33XX_CM_PER_MOD 58 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_PER_MLB_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x0020) AM33XX_CM_PER_MOD 60 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_PER_TPTC0_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x0024) AM33XX_CM_PER_MOD 62 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_PER_EMIF_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x0028) AM33XX_CM_PER_MOD 64 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_PER_OCMCRAM_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x002c) AM33XX_CM_PER_MOD 66 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_PER_GPMC_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x0030) AM33XX_CM_PER_MOD 68 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_PER_MCASP0_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x0034) AM33XX_CM_PER_MOD 70 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_PER_UART5_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x0038) AM33XX_CM_PER_MOD 72 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_PER_MMC0_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x003c) AM33XX_CM_PER_MOD 74 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_PER_ELM_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x0040) AM33XX_CM_PER_MOD 76 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_PER_I2C2_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x0044) AM33XX_CM_PER_MOD 78 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_PER_I2C1_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x0048) AM33XX_CM_PER_MOD 80 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_PER_SPI0_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x004c) AM33XX_CM_PER_MOD 82 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_PER_SPI1_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x0050) AM33XX_CM_PER_MOD 84 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_PER_SPI2_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x0054) AM33XX_CM_PER_MOD 86 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_PER_SPI3_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x0058) AM33XX_CM_PER_MOD 88 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_PER_L4LS_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x0060) AM33XX_CM_PER_MOD 90 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_PER_L4FW_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x0064) AM33XX_CM_PER_MOD 92 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_PER_MCASP1_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x0068) AM33XX_CM_PER_MOD 94 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_PER_UART1_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x006c) AM33XX_CM_PER_MOD 96 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_PER_UART2_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x0070) AM33XX_CM_PER_MOD 98 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_PER_UART3_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x0074) AM33XX_CM_PER_MOD 100 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_PER_UART4_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x0078) AM33XX_CM_PER_MOD 102 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_PER_TIMER7_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x007c) AM33XX_CM_PER_MOD 104 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_PER_TIMER2_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x0080) AM33XX_CM_PER_MOD 106 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_PER_TIMER3_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x0084) AM33XX_CM_PER_MOD 108 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_PER_TIMER4_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x0088) AM33XX_CM_PER_MOD 110 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_PER_MCASP2_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x008c) AM33XX_CM_PER_MOD 112 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_PER_RNG_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x0090) AM33XX_CM_PER_MOD 114 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_PER_AES0_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x0094) AM33XX_CM_PER_MOD 116 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_PER_AES1_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x0098) AM33XX_CM_PER_MOD 118 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_PER_DES_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x009c) AM33XX_CM_PER_MOD 120 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_PER_SHA0_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x00a0) AM33XX_CM_PER_MOD 122 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_PER_PKA_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x00a4) AM33XX_CM_PER_MOD 124 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_PER_GPIO6_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x00a8) AM33XX_CM_PER_MOD 126 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_PER_GPIO1_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x00ac) AM33XX_CM_PER_MOD 128 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_PER_GPIO2_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x00b0) AM33XX_CM_PER_MOD 130 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_PER_GPIO3_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x00b4) AM33XX_CM_PER_MOD 132 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_PER_GPIO4_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x00b8) AM33XX_CM_PER_MOD 134 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_PER_TPCC_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x00bc) AM33XX_CM_PER_MOD 136 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_PER_DCAN0_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x00c0) AM33XX_CM_PER_MOD 138 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_PER_DCAN1_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x00c4) AM33XX_CM_PER_MOD 140 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_PER_EPWMSS1_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x00cc) AM33XX_CM_PER_MOD 142 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_PER_EMIF_FW_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x00d0) AM33XX_CM_PER_MOD 144 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_PER_EPWMSS0_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x00d4) AM33XX_CM_PER_MOD 146 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_PER_EPWMSS2_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x00d8) AM33XX_CM_PER_MOD 148 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_PER_L3_INSTR_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x00dc) AM33XX_CM_PER_MOD 150 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_PER_L3_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x00e0) AM33XX_CM_PER_MOD 152 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_PER_IEEE5000_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x00e4) AM33XX_CM_PER_MOD 154 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_PER_PRUSS_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x00e8) AM33XX_CM_PER_MOD 156 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_PER_TIMER5_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x00ec) AM33XX_CM_PER_MOD 158 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_PER_TIMER6_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x00f0) AM33XX_CM_PER_MOD 160 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_PER_MMC1_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x00f4) AM33XX_CM_PER_MOD 162 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_PER_MMC2_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x00f8) AM33XX_CM_PER_MOD 164 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_PER_TPTC1_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x00fc) AM33XX_CM_PER_MOD 166 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_PER_TPTC2_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x0100) AM33XX_CM_PER_MOD 168 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_PER_GPIO5_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x0104) AM33XX_CM_PER_MOD 170 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_PER_SPINLOCK_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x010c) AM33XX_CM_PER_MOD 172 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_PER_MAILBOX0_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x0110) AM33XX_CM_PER_MOD 174 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_PER_L4HS_CLKSTCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x011c) AM33XX_CM_PER_MOD 176 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_PER_L4HS_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x0120) AM33XX_CM_PER_MOD 178 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_PER_MSTR_EXPS_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x0124) AM33XX_CM_PER_MOD 180 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_PER_SLV_EXPS_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x0128) AM33XX_CM_PER_MOD 182 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_PER_OCPWP_L3_CLKSTCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x012c) AM33XX_CM_PER_MOD 184 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_PER_OCPWP_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x0130) AM33XX_CM_PER_MOD 186 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_PER_MAILBOX1_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x0134) AM33XX_CM_PER_MOD 188 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_PER_PRUSS_CLKSTCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x0140) AM33XX_CM_PER_MOD 190 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_PER_CPSW_CLKSTCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x0144) AM33XX_CM_PER_MOD 192 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_PER_LCDC_CLKSTCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x0148) AM33XX_CM_PER_MOD 194 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_PER_CLKDIV32K_CLKCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x014c) AM33XX_CM_PER_MOD 196 arch/arm/mach-omap2/cm33xx.h #define AM33XX_CM_PER_CLK_24MHZ_CLKSTCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x0150)