GRPH_INT_STATUS  7312 drivers/gpu/drm/radeon/cik.c 	rdev->irq.stat_regs.cik.d1grph_int = RREG32(GRPH_INT_STATUS +
GRPH_INT_STATUS  7314 drivers/gpu/drm/radeon/cik.c 	rdev->irq.stat_regs.cik.d2grph_int = RREG32(GRPH_INT_STATUS +
GRPH_INT_STATUS  7317 drivers/gpu/drm/radeon/cik.c 		rdev->irq.stat_regs.cik.d3grph_int = RREG32(GRPH_INT_STATUS +
GRPH_INT_STATUS  7319 drivers/gpu/drm/radeon/cik.c 		rdev->irq.stat_regs.cik.d4grph_int = RREG32(GRPH_INT_STATUS +
GRPH_INT_STATUS  7323 drivers/gpu/drm/radeon/cik.c 		rdev->irq.stat_regs.cik.d5grph_int = RREG32(GRPH_INT_STATUS +
GRPH_INT_STATUS  7325 drivers/gpu/drm/radeon/cik.c 		rdev->irq.stat_regs.cik.d6grph_int = RREG32(GRPH_INT_STATUS +
GRPH_INT_STATUS  7330 drivers/gpu/drm/radeon/cik.c 		WREG32(GRPH_INT_STATUS + EVERGREEN_CRTC0_REGISTER_OFFSET,
GRPH_INT_STATUS  7333 drivers/gpu/drm/radeon/cik.c 		WREG32(GRPH_INT_STATUS + EVERGREEN_CRTC1_REGISTER_OFFSET,
GRPH_INT_STATUS  7346 drivers/gpu/drm/radeon/cik.c 			WREG32(GRPH_INT_STATUS + EVERGREEN_CRTC2_REGISTER_OFFSET,
GRPH_INT_STATUS  7349 drivers/gpu/drm/radeon/cik.c 			WREG32(GRPH_INT_STATUS + EVERGREEN_CRTC3_REGISTER_OFFSET,
GRPH_INT_STATUS  7363 drivers/gpu/drm/radeon/cik.c 			WREG32(GRPH_INT_STATUS + EVERGREEN_CRTC4_REGISTER_OFFSET,
GRPH_INT_STATUS  7366 drivers/gpu/drm/radeon/cik.c 			WREG32(GRPH_INT_STATUS + EVERGREEN_CRTC5_REGISTER_OFFSET,
GRPH_INT_STATUS  4623 drivers/gpu/drm/radeon/evergreen.c 			grph_int[i] = RREG32(GRPH_INT_STATUS + crtc_offsets[i]);
GRPH_INT_STATUS  4630 drivers/gpu/drm/radeon/evergreen.c 				WREG32(GRPH_INT_STATUS + crtc_offsets[j],
GRPH_INT_STATUS  6157 drivers/gpu/drm/radeon/si.c 			grph_int[i] = RREG32(GRPH_INT_STATUS + crtc_offsets[i]);
GRPH_INT_STATUS  6164 drivers/gpu/drm/radeon/si.c 				WREG32(GRPH_INT_STATUS + crtc_offsets[j],