GPIO_D5_SPI_CCLK 99 sound/pci/ice1712/quartet.c #define GPIO_SPI_ALL (GPIO_D4_SPI_CDTO | GPIO_D5_SPI_CCLK |\ GPIO_D5_SPI_CCLK 104 sound/pci/ice1712/quartet.c GPIO_D4_SPI_CDTO | GPIO_D5_SPI_CCLK | \ GPIO_D5_SPI_CCLK 118 sound/pci/ice1712/quartet.c #define SCR_AIN12_SEL1 GPIO_D5_SPI_CCLK GPIO_D5_SPI_CCLK 140 sound/pci/ice1712/quartet.c #define MCR_OUT12_MON34 GPIO_D5_SPI_CCLK GPIO_D5_SPI_CCLK 152 sound/pci/ice1712/quartet.c #define CPLD_COAX_OUT GPIO_D5_SPI_CCLK GPIO_D5_SPI_CCLK 293 sound/pci/ice1712/quartet.c tmp &= ~GPIO_D5_SPI_CCLK; GPIO_D5_SPI_CCLK 304 sound/pci/ice1712/quartet.c tmp |= GPIO_D5_SPI_CCLK;