GPDR 74 arch/arm/mach-pxa/mfp-pxa2xx.c GPDR(gpio) |= mask; GPDR 76 arch/arm/mach-pxa/mfp-pxa2xx.c GPDR(gpio) &= ~mask; GPDR 358 arch/arm/mach-pxa/mfp-pxa2xx.c (GPDR(i) & GPIO_bit(i))) { GPDR 369 arch/arm/mach-pxa/mfp-pxa2xx.c saved_gpdr[i] = GPDR(i * 32); GPDR 382 arch/arm/mach-pxa/mfp-pxa2xx.c GPDR(i) |= GPIO_bit(i); GPDR 384 arch/arm/mach-pxa/mfp-pxa2xx.c GPDR(i) &= ~GPIO_bit(i); GPDR 399 arch/arm/mach-pxa/mfp-pxa2xx.c GPDR(i * 32) = saved_gpdr[i]; GPDR 432 arch/arm/mach-pxa/mfp-pxa2xx.c gpdr_lpm[i] = GPDR(i * 32); GPDR 159 arch/arm/mach-sa1100/assabet.c GPDR &= ~SDA; GPDR 167 arch/arm/mach-sa1100/assabet.c GPDR |= SDA; GPDR 173 arch/arm/mach-sa1100/assabet.c unsigned gpdr = GPDR; GPDR 180 arch/arm/mach-sa1100/assabet.c GPDR = (GPDR | SCK | MOD) & ~SDA; GPDR 184 arch/arm/mach-sa1100/assabet.c GPDR |= SDA; GPDR 195 arch/arm/mach-sa1100/assabet.c GPDR = gpdr; GPDR 551 arch/arm/mach-sa1100/assabet.c GPDR |= GPIO_GPIO16; GPDR 560 arch/arm/mach-sa1100/assabet.c GPDR |= GPIO_SSP_TXD | GPIO_SSP_SCLK | GPIO_SSP_SFRM; GPDR 568 arch/arm/mach-sa1100/assabet.c GPDR |= GPIO_GPIO27; GPDR 658 arch/arm/mach-sa1100/assabet.c GPDR |= 0x3fc; /* Configure GPIO 9:2 as outputs */ GPDR 660 arch/arm/mach-sa1100/assabet.c GPDR &= ~(0x3fc); /* Configure GPIO 9:2 as inputs */ GPDR 663 arch/arm/mach-sa1100/assabet.c GPDR |= 0x3fc; /* restore correct pin direction */ GPDR 184 arch/arm/mach-sa1100/badge4.c GPDR &= ~BADGE4_GPIO_INT_VID; GPDR 185 arch/arm/mach-sa1100/badge4.c GPDR |= (BADGE4_GPIO_LGP2 | BADGE4_GPIO_LGP3 | GPDR 194 arch/arm/mach-sa1100/badge4.c GPDR |= (BADGE4_GPIO_SDSDA | BADGE4_GPIO_SDSCL); GPDR 198 arch/arm/mach-sa1100/badge4.c GPDR |= (BADGE4_GPIO_UART_HS1 | BADGE4_GPIO_UART_HS2); GPDR 202 arch/arm/mach-sa1100/badge4.c GPDR |= BADGE4_GPIO_MUXSEL0; GPDR 205 arch/arm/mach-sa1100/badge4.c GPDR &= ~(BADGE4_GPIO_TESTPT_J5 | BADGE4_GPIO_TESTPT_J6); GPDR 207 arch/arm/mach-sa1100/badge4.c GPDR |= BADGE4_GPIO_TESTPT_J7; GPDR 211 arch/arm/mach-sa1100/badge4.c GPDR |= BADGE4_GPIO_PCMEN5V; GPDR 33 arch/arm/mach-sa1100/clock.c GPDR |= GPIO_32_768kHz; GPDR 44 arch/arm/mach-sa1100/clock.c GPDR &= ~GPIO_32_768kHz; GPDR 364 arch/arm/mach-sa1100/collie.c GPDR = GPIO_LDD8 | GPIO_LDD9 | GPIO_LDD10 | GPIO_LDD11 | GPIO_LDD12 | GPDR 441 arch/arm/mach-sa1100/generic.c GPDR = (GPDR & ~GPIO_MBREQ) | GPIO_MBGNT; GPDR 460 arch/arm/mach-sa1100/generic.c GPDR = (GPDR & ~GPIO_MBREQ) | GPIO_MBGNT; GPDR 286 arch/arm/mach-sa1100/h3xxx.c GPDR = 0; /* Configure all GPIOs as input */ GPDR 265 arch/arm/mach-sa1100/jornada720.c GPDR |= GPIO_GPIO20; /* Clear gpio20 pin as input */ GPDR 161 arch/arm/mach-sa1100/lart.c GPDR |= GPIO_UART_TXD; GPDR 162 arch/arm/mach-sa1100/lart.c GPDR &= ~GPIO_UART_RXD; GPDR 169 arch/arm/mach-sa1100/pci-nanoengine.c GPDR = (GPDR & ~GPIO_MBREQ) | GPIO_MBGNT; GPDR 120 arch/arm/mach-sa1100/pleb.c GPDR |= GPIO_UART_TXD; GPDR 121 arch/arm/mach-sa1100/pleb.c GPDR &= ~GPIO_UART_RXD; GPDR 132 arch/arm/mach-sa1100/pleb.c GPDR |= GPIO_ETH0_EN; /* set to output */ GPDR 135 arch/arm/mach-sa1100/pleb.c GPDR &= ~GPIO_ETH0_IRQ; GPDR 62 arch/arm/mach-sa1100/pm.c SAVE(GPDR); GPDR 96 arch/arm/mach-sa1100/pm.c RESTORE(GPDR); GPDR 130 arch/arm/mach-sa1100/shannon.c GPDR |= GPIO_UART_TXD | SHANNON_GPIO_CODEC_RESET; GPDR 131 arch/arm/mach-sa1100/shannon.c GPDR &= ~GPIO_UART_RXD; GPDR 216 arch/arm/mach-sa1100/simpad.c GPDR |= GPIO_UART_TXD | GPIO_LDD13 | GPIO_LDD15; GPDR 217 arch/arm/mach-sa1100/simpad.c GPDR &= ~GPIO_UART_RXD; GPDR 123 drivers/gpio/gpio-intel-mid.c void __iomem *gpdr = gpio_reg(chip, offset, GPDR); GPDR 146 drivers/gpio/gpio-intel-mid.c void __iomem *gpdr = gpio_reg(chip, offset, GPDR); GPDR 126 drivers/gpio/gpio-merrifield.c void __iomem *gpdr = gpio_reg(chip, offset, GPDR); GPDR 145 drivers/gpio/gpio-merrifield.c void __iomem *gpdr = gpio_reg(chip, offset, GPDR); GPDR 163 drivers/gpio/gpio-merrifield.c void __iomem *gpdr = gpio_reg(chip, offset, GPDR); GPDR 774 drivers/video/fbdev/sa1100fb.c GPDR |= mask;