GPCPLL_CFG2       534 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c 	nvkm_mask(device, GPCPLL_CFG2, 0xff << GPCPLL_CFG2_PLL_STEPA_SHIFT,
GPCPLL_CFG2       167 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c 	val = nvkm_rd32(device, GPCPLL_CFG2);
GPCPLL_CFG2       177 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c 	nvkm_mask(device, GPCPLL_CFG2, GPCPLL_CFG2_SDM_DIN_MASK,
GPCPLL_CFG2       290 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c 	nvkm_mask(device, GPCPLL_CFG2, GPCPLL_CFG2_SDM_DIN_NEW_MASK,
GPCPLL_CFG2       309 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c 	nvkm_mask(device, GPCPLL_CFG2, GPCPLL_CFG2_SDM_DIN_MASK,