GML_48KHZ         154 sound/pci/echoaudio/gina24_dsp.c 		control_reg = GML_CONVERTER_ENABLE | GML_48KHZ;
GML_48KHZ         193 sound/pci/echoaudio/gina24_dsp.c 		clock = GML_48KHZ | GML_SPDIF_SAMPLE_RATE1;
GML_48KHZ         149 sound/pci/echoaudio/layla24_dsp.c 		err = write_control_reg(chip, GML_CONVERTER_ENABLE | GML_48KHZ,
GML_48KHZ         189 sound/pci/echoaudio/layla24_dsp.c 		clock = GML_48KHZ | GML_SPDIF_SAMPLE_RATE1;
GML_48KHZ         150 sound/pci/echoaudio/mona_dsp.c 		control_reg = GML_CONVERTER_ENABLE | GML_48KHZ;
GML_48KHZ         256 sound/pci/echoaudio/mona_dsp.c 		clock = GML_48KHZ | GML_SPDIF_SAMPLE_RATE1;