GMBUS_SW_CLR_INT  338 drivers/gpu/drm/gma500/intel_gmbus.c 	GMBUS_REG_WRITE(GMBUS1 + reg_offset, GMBUS_SW_CLR_INT);
GMBUS_SW_CLR_INT  672 drivers/gpu/drm/i915/display/intel_gmbus.c 	I915_WRITE_FW(GMBUS1, GMBUS_SW_CLR_INT);
GMBUS_SW_CLR_INT  182 drivers/gpu/drm/i915/gvt/edid.c 	if (vgpu_vreg(vgpu, offset) & GMBUS_SW_CLR_INT) {
GMBUS_SW_CLR_INT  183 drivers/gpu/drm/i915/gvt/edid.c 		if (!(wvalue & GMBUS_SW_CLR_INT)) {
GMBUS_SW_CLR_INT  184 drivers/gpu/drm/i915/gvt/edid.c 			vgpu_vreg(vgpu, offset) &= ~GMBUS_SW_CLR_INT;
GMBUS_SW_CLR_INT  197 drivers/gpu/drm/i915/gvt/edid.c 		if (wvalue & GMBUS_SW_CLR_INT) {