GMBUS1            269 drivers/gpu/drm/gma500/intel_gmbus.c 			GMBUS_REG_WRITE(GMBUS1 + reg_offset,
GMBUS1            300 drivers/gpu/drm/gma500/intel_gmbus.c 			GMBUS_REG_WRITE(GMBUS1 + reg_offset,
GMBUS1            338 drivers/gpu/drm/gma500/intel_gmbus.c 	GMBUS_REG_WRITE(GMBUS1 + reg_offset, GMBUS_SW_CLR_INT);
GMBUS1            339 drivers/gpu/drm/gma500/intel_gmbus.c 	GMBUS_REG_WRITE(GMBUS1 + reg_offset, 0);
GMBUS1            410 drivers/gpu/drm/i915/display/intel_gmbus.c 	I915_WRITE_FW(GMBUS1,
GMBUS1            493 drivers/gpu/drm/i915/display/intel_gmbus.c 	I915_WRITE_FW(GMBUS1,
GMBUS1            632 drivers/gpu/drm/i915/display/intel_gmbus.c 	I915_WRITE_FW(GMBUS1, GMBUS_CYCLE_STOP | GMBUS_SW_RDY);
GMBUS1            672 drivers/gpu/drm/i915/display/intel_gmbus.c 	I915_WRITE_FW(GMBUS1, GMBUS_SW_CLR_INT);
GMBUS1            673 drivers/gpu/drm/i915/display/intel_gmbus.c 	I915_WRITE_FW(GMBUS1, 0);