GICD_INT_DEF_PRI  155 arch/arm64/include/asm/arch_gicv3.h 	BUILD_BUG_ON(GICD_INT_DEF_PRI < (GIC_PRIO_IRQOFF |
GICD_INT_DEF_PRI  157 arch/arm64/include/asm/arch_gicv3.h 	BUILD_BUG_ON(GICD_INT_DEF_PRI >= GIC_PRIO_IRQON);
GICD_INT_DEF_PRI  163 arch/arm64/include/asm/arch_gicv3.h 	BUILD_BUG_ON((0x80 | (GICD_INT_DEF_PRI >> 1)) >= GIC_PRIO_IRQON);
GICD_INT_DEF_PRI   59 drivers/irqchip/irq-gic-v3-its.c #define LPI_PROP_DEFAULT_PRIO	GICD_INT_DEF_PRI
GICD_INT_DEF_PRI   34 drivers/irqchip/irq-gic-v3.c #define GICD_INT_NMI_PRI	(GICD_INT_DEF_PRI & ~0x80)
GICD_INT_DEF_PRI  504 drivers/irqchip/irq-gic-v3.c 	gic_irq_set_prio(d, GICD_INT_DEF_PRI);
GICD_INT_DEF_PRI   14 include/linux/irqchip/arm-gic-common.h #define GICD_INT_DEF_PRI_X4		((GICD_INT_DEF_PRI << 24) |\
GICD_INT_DEF_PRI   15 include/linux/irqchip/arm-gic-common.h 					(GICD_INT_DEF_PRI << 16) |\
GICD_INT_DEF_PRI   16 include/linux/irqchip/arm-gic-common.h 					(GICD_INT_DEF_PRI << 8) |\
GICD_INT_DEF_PRI   17 include/linux/irqchip/arm-gic-common.h 					GICD_INT_DEF_PRI)