GICD_CTLR         169 drivers/irqchip/irq-gic-v3.c 	while (readl_relaxed(base + GICD_CTLR) & GICD_CTLR_RWP) {
GICD_CTLR         719 drivers/irqchip/irq-gic-v3.c 	writel_relaxed(0, base + GICD_CTLR);
GICD_CTLR         751 drivers/irqchip/irq-gic-v3.c 		       base + GICD_CTLR);
GICD_CTLR         874 drivers/irqchip/irq-gic-v3.c 	return readl_relaxed(gic_data.dist_base + GICD_CTLR) & GICD_CTLR_DS;
GICD_CTLR         104 include/linux/irqchip/arm-gic-v3.h #define GICR_CTLR			GICD_CTLR
GICD_CTLR          68 virt/kvm/arm/vgic/vgic-mmio-v3.c 	case GICD_CTLR:
GICD_CTLR         103 virt/kvm/arm/vgic/vgic-mmio-v3.c 	case GICD_CTLR:
GICD_CTLR         468 virt/kvm/arm/vgic/vgic-mmio-v3.c 	REGISTER_DESC_WITH_LENGTH_UACCESS(GICD_CTLR,