GEN9_HALF_SLICE_CHICKEN5  313 drivers/gpu/drm/i915/gt/intel_workarounds.c 	WA_CLR_BIT_MASKED(GEN9_HALF_SLICE_CHICKEN5,
GEN9_HALF_SLICE_CHICKEN5  109 drivers/gpu/drm/i915/gvt/mmio_context.c 	{RCS0, GEN9_HALF_SLICE_CHICKEN5, 0xffff, true}, /* 0xe188 */