GEN8_RPCS_SS_CNT_SHIFT  825 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c 		(rpcs & GEN8_RPCS_SS_CNT_MASK) >> GEN8_RPCS_SS_CNT_SHIFT,
GEN8_RPCS_SS_CNT_SHIFT  132 drivers/gpu/drm/i915/gt/intel_sseu.c 		val <<= GEN8_RPCS_SS_CNT_SHIFT;
GEN8_RPCS_SS_CNT_SHIFT  433 drivers/gpu/drm/i915/i915_reg.h #define   GEN8_RPCS_SS_CNT_MASK		(0x7 << GEN8_RPCS_SS_CNT_SHIFT)