GEN8_EU_DIS0_S1_SHIFT 2937 drivers/gpu/drm/i915/i915_reg.h #define   GEN8_EU_DIS0_S1_MASK		(0xff << GEN8_EU_DIS0_S1_SHIFT)
GEN8_EU_DIS0_S1_SHIFT  489 drivers/gpu/drm/i915/intel_device_info.c 	eu_disable[1] = (I915_READ(GEN8_EU_DISABLE0) >> GEN8_EU_DIS0_S1_SHIFT) |
GEN8_EU_DIS0_S1_SHIFT  491 drivers/gpu/drm/i915/intel_device_info.c 			 (32 - GEN8_EU_DIS0_S1_SHIFT));