GEN8_DE_PORT_ISR 5197 drivers/gpu/drm/i915/display/intel_dp.c 		return I915_READ(GEN8_DE_PORT_ISR) & GEN8_PORT_DP_A_HOTPLUG;
GEN8_DE_PORT_ISR 5222 drivers/gpu/drm/i915/display/intel_dp.c 	return I915_READ(GEN8_DE_PORT_ISR) & bit;
GEN8_DE_PORT_ISR  175 drivers/gpu/drm/i915/gvt/display.c 		vgpu_vreg_t(vgpu, GEN8_DE_PORT_ISR) &= ~(BXT_DE_PORT_HP_DDIA |
GEN8_DE_PORT_ISR  180 drivers/gpu/drm/i915/gvt/display.c 			vgpu_vreg_t(vgpu, GEN8_DE_PORT_ISR) |=
GEN8_DE_PORT_ISR  185 drivers/gpu/drm/i915/gvt/display.c 			vgpu_vreg_t(vgpu, GEN8_DE_PORT_ISR) |=
GEN8_DE_PORT_ISR  190 drivers/gpu/drm/i915/gvt/display.c 			vgpu_vreg_t(vgpu, GEN8_DE_PORT_ISR) |=
GEN8_DE_PORT_ISR  324 drivers/gpu/drm/i915/gvt/display.c 			vgpu_vreg_t(vgpu, GEN8_DE_PORT_ISR) |=
GEN8_DE_PORT_ISR 2726 drivers/gpu/drm/i915/gvt/handlers.c 	MMIO_D(GEN8_DE_PORT_ISR, D_BDW_PLUS);
GEN8_DE_PORT_ISR  452 drivers/gpu/drm/i915/gvt/interrupt.c DEFINE_GVT_GEN8_INTEL_GVT_IRQ_INFO(de_port, GEN8_DE_PORT_ISR);