GEN6_UCGCTL1 2539 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(GEN6_UCGCTL1, D_ALL); GEN6_UCGCTL1 2276 drivers/gpu/drm/i915/i915_drv.c s->ucgctl1 = I915_READ(GEN6_UCGCTL1); GEN6_UCGCTL1 2361 drivers/gpu/drm/i915/i915_drv.c I915_WRITE(GEN6_UCGCTL1, s->ucgctl1); GEN6_UCGCTL1 1621 drivers/gpu/drm/i915/i915_perf.c I915_WRITE(GEN6_UCGCTL1, (I915_READ(GEN6_UCGCTL1) | GEN6_UCGCTL1 1637 drivers/gpu/drm/i915/i915_perf.c I915_WRITE(GEN6_UCGCTL1, (I915_READ(GEN6_UCGCTL1) & GEN6_UCGCTL1 9054 drivers/gpu/drm/i915/intel_pm.c I915_WRITE(GEN6_UCGCTL1, GEN6_UCGCTL1 9055 drivers/gpu/drm/i915/intel_pm.c I915_READ(GEN6_UCGCTL1) | GEN6_UCGCTL1 9278 drivers/gpu/drm/i915/intel_pm.c I915_WRITE(GEN6_UCGCTL1, I915_READ(GEN6_UCGCTL1) | GEN6_UCGCTL1 9344 drivers/gpu/drm/i915/intel_pm.c I915_WRITE(GEN6_UCGCTL1, GEN6_UCGCTL1 9345 drivers/gpu/drm/i915/intel_pm.c I915_READ(GEN6_UCGCTL1) | GEN6_EU_TCUNIT_CLOCK_GATE_DISABLE); GEN6_UCGCTL1 9584 drivers/gpu/drm/i915/intel_pm.c I915_WRITE(GEN6_UCGCTL1, I915_READ(GEN6_UCGCTL1) |