GEN6_BSD_RING_BASE 93 drivers/gpu/drm/i915/gt/intel_engine_cs.c { .gen = 6, .base = GEN6_BSD_RING_BASE }, GEN6_BSD_RING_BASE 1838 drivers/gpu/drm/i915/gvt/handlers.c MMIO_F(prefix(GEN6_BSD_RING_BASE), s, f, am, rm, d, r, w); \ GEN6_BSD_RING_BASE 2413 drivers/gpu/drm/i915/i915_reg.h #define GEN6_VBSYNC (RING_SYNC_0(GEN6_BSD_RING_BASE)) GEN6_BSD_RING_BASE 2414 drivers/gpu/drm/i915/i915_reg.h #define GEN6_VRSYNC (RING_SYNC_1(GEN6_BSD_RING_BASE)) GEN6_BSD_RING_BASE 2415 drivers/gpu/drm/i915/i915_reg.h #define GEN6_VVESYNC (RING_SYNC_2(GEN6_BSD_RING_BASE)) GEN6_BSD_RING_BASE 918 drivers/gpu/drm/i915/intel_uncore.c RING_TAIL(GEN6_BSD_RING_BASE), /* 0x12000 (base) */