G4X_WM_LEVEL_SR 1063 drivers/gpu/drm/i915/intel_pm.c dev_priv->wm.pri_latency[G4X_WM_LEVEL_SR] = 12; G4X_WM_LEVEL_SR 1101 drivers/gpu/drm/i915/intel_pm.c case G4X_WM_LEVEL_SR: G4X_WM_LEVEL_SR 1198 drivers/gpu/drm/i915/intel_pm.c level = max(level, G4X_WM_LEVEL_SR); G4X_WM_LEVEL_SR 1273 drivers/gpu/drm/i915/intel_pm.c crtc_state->wm.g4x.raw[G4X_WM_LEVEL_SR].plane[plane_id], G4X_WM_LEVEL_SR 1278 drivers/gpu/drm/i915/intel_pm.c crtc_state->wm.g4x.raw[G4X_WM_LEVEL_SR].fbc, G4X_WM_LEVEL_SR 1317 drivers/gpu/drm/i915/intel_pm.c if (level <= G4X_WM_LEVEL_SR) { G4X_WM_LEVEL_SR 1370 drivers/gpu/drm/i915/intel_pm.c level = G4X_WM_LEVEL_SR; G4X_WM_LEVEL_SR 1411 drivers/gpu/drm/i915/intel_pm.c if (level >= G4X_WM_LEVEL_SR && G4X_WM_LEVEL_SR 1412 drivers/gpu/drm/i915/intel_pm.c wm_state->sr.fbc > g4x_fbc_fifo_size(G4X_WM_LEVEL_SR)) G4X_WM_LEVEL_SR 1471 drivers/gpu/drm/i915/intel_pm.c g4x_plane_fifo_size(PLANE_PRIMARY, G4X_WM_LEVEL_SR) || G4X_WM_LEVEL_SR 1473 drivers/gpu/drm/i915/intel_pm.c g4x_plane_fifo_size(PLANE_CURSOR, G4X_WM_LEVEL_SR)) && G4X_WM_LEVEL_SR 6019 drivers/gpu/drm/i915/intel_pm.c max_level = G4X_WM_LEVEL_SR;