G1                 62 arch/sparc/kernel/ptrace_64.c 	REG_OFFSET_NAME("g1", G1),
G1                 39 arch/sparc/net/bpf_jit_32.h #define r_TMP		G1
G1                231 arch/sparc/net/bpf_jit_comp_64.c 	[TMP_REG_1] = G1,
G1                 54 crypto/twofish_generic.c    x = G1 (a); y = G2 (b); \
G1                 61 crypto/twofish_generic.c    x = G1 (a); y = G2 (b); \
G1               1394 drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c SIG_EXPR_LIST_DECL_SINGLE(G1, GPIOX5, GPIOX5, SIG_DESC_SET(SCUA4, 5));
G1               1395 drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c SIG_EXPR_LIST_DECL_SINGLE(G1, ADC13, ADC13);
G1               1396 drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c PIN_DECL_(G1, SIG_EXPR_LIST_PTR(G1, GPIOX5), SIG_EXPR_LIST_PTR(G1, ADC13));
G1               1397 drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c FUNC_GROUP_DECL(ADC13, G1);
G1               2024 drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c 	ASPEED_PINCTRL_PIN(G1),
G1               2591 drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c 	{ PIN_CONFIG_BIAS_PULL_DOWN, { G1, G1 }, SCUA8, 17 },
G1               2592 drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c 	{ PIN_CONFIG_BIAS_DISABLE,   { G1, G1 }, SCUA8, 17 },
G1               1563 drivers/pinctrl/pinctrl-pic32.c 	PIC32_PINCTRL_GROUP(97, G1,