A5 1158 drivers/pinctrl/aspeed/pinctrl-aspeed-g4.c SIG_EXPR_LIST_DECL_SINGLE(A5, MDIO1, MDIO1, SIG_DESC_SET(SCU88, 31)); A5 1159 drivers/pinctrl/aspeed/pinctrl-aspeed-g4.c PIN_DECL_1(A5, GPIOR7, MDIO1); A5 1161 drivers/pinctrl/aspeed/pinctrl-aspeed-g4.c FUNC_GROUP_DECL(MDIO1, C6, A5); A5 1923 drivers/pinctrl/aspeed/pinctrl-aspeed-g4.c ASPEED_PINCTRL_PIN(A5), A5 2470 drivers/pinctrl/aspeed/pinctrl-aspeed-g4.c { PIN_CONFIG_BIAS_PULL_DOWN, { V20, A5 }, SCU8C, 31 }, A5 2471 drivers/pinctrl/aspeed/pinctrl-aspeed-g4.c { PIN_CONFIG_BIAS_DISABLE, { V20, A5 }, SCU8C, 31 }, A5 1162 drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c SIG_EXPR_LIST_DECL_SINGLE(A5, GPIOT3, GPIOT3, SIG_DESC_SET(SCUA0, 3)); A5 1163 drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c SIG_EXPR_LIST_DECL_SINGLE(A5, RMII1TXD1, RMII1, RMII1_DESC); A5 1164 drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c SIG_EXPR_LIST_DECL_SINGLE(A5, RGMII1TXD1, RGMII1); A5 1165 drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c PIN_DECL_(A5, SIG_EXPR_LIST_PTR(A5, GPIOT3), SIG_EXPR_LIST_PTR(A5, RMII1TXD1), A5 1166 drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c SIG_EXPR_LIST_PTR(A5, RGMII1TXD1)); A5 1267 drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c FUNC_GROUP_DECL(RGMII1, B4, A4, A3, D6, C5, C4, B5, E9, F9, A5, E7, D7); A5 1268 drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c FUNC_GROUP_DECL(RMII1, B4, A3, D6, C5, C4, B5, E9, F9, A5); A5 1918 drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c ASPEED_PINCTRL_PIN(A5), A5 2546 drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c { PIN_CONFIG_DRIVE_STRENGTH, { E9, A5 }, SCU90, 9 }, A5 689 drivers/pinctrl/sh-pfc/pfc-r8a77470.c PINMUX_IPSR_GPSR(IP4_27_24, A5), A5 577 drivers/pinctrl/sh-pfc/pfc-r8a7778.c PINMUX_IPSR_GPSR(IP0_16, A5), A5 914 drivers/pinctrl/sh-pfc/pfc-r8a7790.c PINMUX_IPSR_GPSR(IP2_11_9, A5), A5 840 drivers/pinctrl/sh-pfc/pfc-r8a7791.c PINMUX_IPSR_GPSR(IP0_28_27, A5), A5 368 drivers/pinctrl/sh-pfc/pfc-r8a7792.c PINMUX_SINGLE(A5), A5 791 drivers/pinctrl/sh-pfc/pfc-r8a7794.c PINMUX_IPSR_GPSR(IP1_29_28, A5), A5 122 drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c #define GPSR1_5 F_(A5, IP2_19_16) A5 276 drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c #define IP2_19_16 FM(A5) FM(LCDOUT21) FM(MSIOF3_SS2_B) FM(SCK4_B) FM(VI4_DATA13) FM(VI5_DATA13) FM(DU_DB5) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) A5 765 drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c PINMUX_IPSR_GPSR(IP2_19_16, A5), A5 123 drivers/pinctrl/sh-pfc/pfc-r8a7795.c #define GPSR1_5 F_(A5, IP2_19_16) A5 277 drivers/pinctrl/sh-pfc/pfc-r8a7795.c #define IP2_19_16 FM(A5) FM(LCDOUT21) FM(MSIOF3_SS2_B) FM(SCK4_B) FM(VI4_DATA13) FM(VI5_DATA13) FM(DU_DB5) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) A5 772 drivers/pinctrl/sh-pfc/pfc-r8a7795.c PINMUX_IPSR_GPSR(IP2_19_16, A5), A5 127 drivers/pinctrl/sh-pfc/pfc-r8a7796.c #define GPSR1_5 F_(A5, IP2_19_16) A5 279 drivers/pinctrl/sh-pfc/pfc-r8a7796.c #define IP2_19_16 FM(A5) FM(LCDOUT21) FM(MSIOF3_SS2_B) FM(SCK4_B) FM(VI4_DATA13) FM(VI5_DATA13) FM(DU_DB5) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) A5 775 drivers/pinctrl/sh-pfc/pfc-r8a7796.c PINMUX_IPSR_GPSR(IP2_19_16, A5), A5 128 drivers/pinctrl/sh-pfc/pfc-r8a77965.c #define GPSR1_5 F_(A5, IP2_19_16) A5 280 drivers/pinctrl/sh-pfc/pfc-r8a77965.c #define IP2_19_16 FM(A5) FM(LCDOUT21) FM(MSIOF3_SS2_B) FM(SCK4_B) FM(VI4_DATA13) FM(VI5_DATA13) FM(DU_DB5) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) A5 778 drivers/pinctrl/sh-pfc/pfc-r8a77965.c PINMUX_IPSR_GPSR(IP2_19_16, A5), A5 158 drivers/pinctrl/sh-pfc/pfc-r8a77970.c #define IP0_23_20 FM(DU_DR7) FM(MSIOF3_TXD) F_(0, 0) FM(A5) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) A5 406 drivers/pinctrl/sh-pfc/pfc-r8a77970.c PINMUX_IPSR_GPSR(IP0_23_20, A5), A5 191 drivers/pinctrl/sh-pfc/pfc-r8a77980.c #define IP0_23_20 FM(DU_DR7) F_(0, 0) FM(GETHER_RMII_TXD0) FM(A5) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) A5 479 drivers/pinctrl/sh-pfc/pfc-r8a77980.c PINMUX_IPSR_GPSR(IP0_23_20, A5), A5 105 drivers/pinctrl/sh-pfc/pfc-r8a77990.c #define GPSR1_5 F_(A5, IP3_19_16) A5 242 drivers/pinctrl/sh-pfc/pfc-r8a77990.c #define IP3_19_16 FM(A5) FM(SCK4_A) FM(MSIOF3_SCK_B) FM(VI4_DATA9) FM(PWM3_B) F_(0, 0) FM(RIF2_SYNC_B) F_(0, 0) FM(QPOLA) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) A5 700 drivers/pinctrl/sh-pfc/pfc-r8a77990.c PINMUX_IPSR_GPSR(IP3_19_16, A5), A5 1282 drivers/pinctrl/sh-pfc/pfc-sh7264.c GPIO_FN(A5), A5 1720 drivers/pinctrl/sh-pfc/pfc-sh7269.c GPIO_FN(A5), A5 616 drivers/pinctrl/sh-pfc/pfc-sh7734.c PINMUX_IPSR_GPSR(IP0_11_10, A5), A5 1375 drivers/pinctrl/sh-pfc/pfc-sh7734.c GPIO_FN(A5), GPIO_FN(ST0_D1), GPIO_FN(LCD_DATA5_A), A5 1645 drivers/pinctrl/sh-pfc/pfc-sh7757.c GPIO_FN(A5), A5 36 tools/perf/arch/riscv/util/unwind-libdw.c dwarf_regs[15] = REG(A5);