FRQMR1             73 arch/sh/kernel/cpu/sh4a/clock-sh7734.c 	[DIV4_I] = DIV4(FRQMR1, 28, 0x0003, CLK_ENABLE_ON_INIT),
FRQMR1             74 arch/sh/kernel/cpu/sh4a/clock-sh7734.c 	[DIV4_S] = DIV4(FRQMR1, 20, 0x000C, CLK_ENABLE_ON_INIT),
FRQMR1             75 arch/sh/kernel/cpu/sh4a/clock-sh7734.c 	[DIV4_B] = DIV4(FRQMR1, 16, 0x0140, CLK_ENABLE_ON_INIT),
FRQMR1             76 arch/sh/kernel/cpu/sh4a/clock-sh7734.c 	[DIV4_M] = DIV4(FRQMR1, 12, 0x0004, CLK_ENABLE_ON_INIT),
FRQMR1             77 arch/sh/kernel/cpu/sh4a/clock-sh7734.c 	[DIV4_S1] = DIV4(FRQMR1, 4, 0x0030, CLK_ENABLE_ON_INIT),
FRQMR1             78 arch/sh/kernel/cpu/sh4a/clock-sh7734.c 	[DIV4_P] = DIV4(FRQMR1, 0, 0x0140, CLK_ENABLE_ON_INIT),
FRQMR1             67 arch/sh/kernel/cpu/sh4a/clock-sh7785.c   SH_CLK_DIV4(&pll_clk, FRQMR1, _bit, _mask, _flags)
FRQMR1             68 arch/sh/kernel/cpu/sh4a/clock-sh7786.c   SH_CLK_DIV4(&pll_clk, FRQMR1, _bit, _mask, _flags)
FRQMR1             62 arch/sh/kernel/cpu/sh4a/clock-shx3.c   SH_CLK_DIV4(&pll_clk, FRQMR1, _bit, _mask, _flags)