FRAC_BITS 47 drivers/cpufreq/intel_pstate.c #define int_tofp(X) ((int64_t)(X) << FRAC_BITS) FRAC_BITS 48 drivers/cpufreq/intel_pstate.c #define fp_toint(X) ((X) >> FRAC_BITS) FRAC_BITS 50 drivers/cpufreq/intel_pstate.c #define ONE_EIGHTH_FP ((int64_t)1 << (FRAC_BITS - 3)) FRAC_BITS 53 drivers/cpufreq/intel_pstate.c #define EXT_FRAC_BITS (EXT_BITS + FRAC_BITS) FRAC_BITS 59 drivers/cpufreq/intel_pstate.c return ((int64_t)x * (int64_t)y) >> FRAC_BITS; FRAC_BITS 64 drivers/cpufreq/intel_pstate.c return div64_s64((int64_t)x << FRAC_BITS, y); FRAC_BITS 72 drivers/cpufreq/intel_pstate.c mask = (1 << FRAC_BITS) - 1; FRAC_BITS 615 drivers/gpu/drm/radeon/radeon_legacy_tv.c tmp |= (vert_space * (1 << FRAC_BITS) / 10000); FRAC_BITS 645 drivers/gpu/drm/radeon/radeon_legacy_tv.c tv_y_saw_tooth_cntl = (vert_space * SLOPE_value[i] * (1 << (FRAC_BITS - 1)) + FRAC_BITS 647 drivers/gpu/drm/radeon/radeon_legacy_tv.c (1 << (FRAC_BITS - 1)) / 8) << 16); FRAC_BITS 650 drivers/gpu/drm/radeon/radeon_legacy_tv.c RADEON_Y_FALL_PING_PONG | (272 * SLOPE_value[i] / 8) * (1 << (FRAC_BITS - 1)) / FRAC_BITS 653 drivers/gpu/drm/radeon/radeon_legacy_tv.c (flicker_removal * 1024 - 272) * SLOPE_value[i] / 8 * (1 << (FRAC_BITS - 1)) / 1024; FRAC_BITS 578 drivers/net/wireless/realtek/rtw88/phy.c linear = i > 2 ? linear << FRAC_BITS : linear; FRAC_BITS 593 drivers/net/wireless/realtek/rtw88/phy.c if (i <= 2 && (linear << FRAC_BITS) <= db_invert_table[i][7]) FRAC_BITS 600 drivers/net/wireless/realtek/rtw88/phy.c if (i <= 2 && (linear << FRAC_BITS) <= db_invert_table[i][j]) FRAC_BITS 650 drivers/net/wireless/realtek/rtw88/phy.c sum = (sum + (1 << (FRAC_BITS - 1))) >> FRAC_BITS; FRAC_BITS 2862 drivers/staging/media/ipu3/ipu3-css-params.c static const unsigned int FRAC_BITS = IMGU_ABI_GDC_FRAC_BITS; FRAC_BITS 2880 drivers/staging/media/ipu3/ipu3-css-params.c gdc_luma.p0_x = (OFFSET_X - (OFFSET_X & XMEM_ALIGN_MASK)) << FRAC_BITS; FRAC_BITS 2882 drivers/staging/media/ipu3/ipu3-css-params.c gdc_luma.p1_x = gdc_luma.p0_x + (IMGU_DVS_BLOCK_W << FRAC_BITS); FRAC_BITS 2885 drivers/staging/media/ipu3/ipu3-css-params.c gdc_luma.p2_y = gdc_luma.p0_y + (IMGU_DVS_BLOCK_H << FRAC_BITS); FRAC_BITS 2903 drivers/staging/media/ipu3/ipu3-css-params.c FRAC_BITS; FRAC_BITS 2905 drivers/staging/media/ipu3/ipu3-css-params.c gdc_chroma.p1_x = gdc_chroma.p0_x + (IMGU_DVS_BLOCK_W << FRAC_BITS); FRAC_BITS 2908 drivers/staging/media/ipu3/ipu3-css-params.c gdc_chroma.p2_y = gdc_chroma.p0_y + (IMGU_DVS_BLOCK_H / 2 << FRAC_BITS); FRAC_BITS 30 drivers/thermal/power_allocator.c #define int_to_frac(x) ((x) << FRAC_BITS) FRAC_BITS 31 drivers/thermal/power_allocator.c #define frac_to_int(x) ((x) >> FRAC_BITS) FRAC_BITS 43 drivers/thermal/power_allocator.c return (x * y) >> FRAC_BITS; FRAC_BITS 56 drivers/thermal/power_allocator.c return div_s64(x << FRAC_BITS, y); FRAC_BITS 402 drivers/thermal/power_allocator.c weight = 1 << FRAC_BITS; FRAC_BITS 112 net/sched/sch_qfq.c #define ONE_FP (1UL << FRAC_BITS) FRAC_BITS 1436 net/sched/sch_qfq.c q->min_slot_shift = FRAC_BITS + maxbudg_shift - QFQ_MAX_INDEX;