FLD_VAL 153 drivers/crypto/omap-aes.c val = FLD_VAL(((dd->ctx->keylen >> 3) - 1), 4, 3); FLD_VAL 48 drivers/gpu/drm/bridge/tc358764.c #define VP_CTRL_MSF(v) FLD_VAL(v, 0, 0) /* Magic square in RGB666 */ FLD_VAL 49 drivers/gpu/drm/bridge/tc358764.c #define VP_CTRL_VTGEN(v) FLD_VAL(v, 4, 4) /* Use chip clock for timing */ FLD_VAL 50 drivers/gpu/drm/bridge/tc358764.c #define VP_CTRL_EVTMODE(v) FLD_VAL(v, 5, 5) /* Event mode */ FLD_VAL 51 drivers/gpu/drm/bridge/tc358764.c #define VP_CTRL_RGB888(v) FLD_VAL(v, 8, 8) /* RGB888 mode */ FLD_VAL 52 drivers/gpu/drm/bridge/tc358764.c #define VP_CTRL_VSDELAY(v) FLD_VAL(v, 31, 20) /* VSYNC delay */ FLD_VAL 57 drivers/gpu/drm/bridge/tc358764.c #define VP_HTIM1_HBP(v) FLD_VAL(v, 24, 16) FLD_VAL 58 drivers/gpu/drm/bridge/tc358764.c #define VP_HTIM1_HSYNC(v) FLD_VAL(v, 8, 0) FLD_VAL 60 drivers/gpu/drm/bridge/tc358764.c #define VP_HTIM2_HFP(v) FLD_VAL(v, 24, 16) FLD_VAL 61 drivers/gpu/drm/bridge/tc358764.c #define VP_HTIM2_HACT(v) FLD_VAL(v, 10, 0) FLD_VAL 63 drivers/gpu/drm/bridge/tc358764.c #define VP_VTIM1_VBP(v) FLD_VAL(v, 23, 16) FLD_VAL 64 drivers/gpu/drm/bridge/tc358764.c #define VP_VTIM1_VSYNC(v) FLD_VAL(v, 7, 0) FLD_VAL 66 drivers/gpu/drm/bridge/tc358764.c #define VP_VTIM2_VFP(v) FLD_VAL(v, 23, 16) FLD_VAL 67 drivers/gpu/drm/bridge/tc358764.c #define VP_VTIM2_VACT(v) FLD_VAL(v, 10, 0) FLD_VAL 78 drivers/gpu/drm/bridge/tc358764.c #define LV_MX(b0, b1, b2, b3) (FLD_VAL(b0, 4, 0) | FLD_VAL(b1, 12, 8) | \ FLD_VAL 79 drivers/gpu/drm/bridge/tc358764.c FLD_VAL(b2, 20, 16) | FLD_VAL(b3, 28, 24)) FLD_VAL 115 drivers/gpu/drm/bridge/tc358764.c #define LV_PHY0_RST(v) FLD_VAL(v, 22, 22) /* PHY reset */ FLD_VAL 116 drivers/gpu/drm/bridge/tc358764.c #define LV_PHY0_IS(v) FLD_VAL(v, 15, 14) FLD_VAL 117 drivers/gpu/drm/bridge/tc358764.c #define LV_PHY0_ND(v) FLD_VAL(v, 4, 0) /* Frequency range select */ FLD_VAL 118 drivers/gpu/drm/bridge/tc358764.c #define LV_PHY0_PRBS_ON(v) FLD_VAL(v, 20, 16) /* Clock/Data Flag pins */ FLD_VAL 48 drivers/gpu/drm/gma500/mdfld_dsi_output.h (((orig) & ~FLD_MASK(start, end)) | FLD_VAL(val, start, end)) FLD_VAL 235 drivers/gpu/drm/gma500/mdfld_dsi_pkg_sender.c val = FLD_VAL(param, 23, 16) | FLD_VAL(cmd, 15, 8) | FLD_VAL 236 drivers/gpu/drm/gma500/mdfld_dsi_pkg_sender.c FLD_VAL(virtual_channel, 7, 6) | FLD_VAL(data_type, 5, 0); FLD_VAL 299 drivers/gpu/drm/gma500/mdfld_dsi_pkg_sender.c val = FLD_VAL(len, 23, 8) | FLD_VAL(virtual_channel, 7, 6) | FLD_VAL 300 drivers/gpu/drm/gma500/mdfld_dsi_pkg_sender.c FLD_VAL(data_type, 5, 0); FLD_VAL 213 drivers/gpu/drm/gma500/tc35876x-dsi-lvds.c (FLD_VAL(lvmx03, 29, 24) | FLD_VAL(lvmx02, 20, 16) | \ FLD_VAL 214 drivers/gpu/drm/gma500/tc35876x-dsi-lvds.c FLD_VAL(lvmx01, 12, 8) | FLD_VAL(lvmx00, 4, 0)) FLD_VAL 365 drivers/gpu/drm/gma500/tc35876x-dsi-lvds.c tc35876x_regw(i2c, PPI_TX_RX_TA, FLD_VAL(txtagocnt, 26, 16) | FLD_VAL 366 drivers/gpu/drm/gma500/tc35876x-dsi-lvds.c FLD_VAL(txtasurecnt, 10, 0)); FLD_VAL 367 drivers/gpu/drm/gma500/tc35876x-dsi-lvds.c tc35876x_regw(i2c, PPI_LPTXTIMECNT, FLD_VAL(ppi_lptxtimecnt, 10, 0)); FLD_VAL 369 drivers/gpu/drm/gma500/tc35876x-dsi-lvds.c tc35876x_regw(i2c, PPI_D0S_CLRSIPOCOUNT, FLD_VAL(1, 5, 0)); FLD_VAL 370 drivers/gpu/drm/gma500/tc35876x-dsi-lvds.c tc35876x_regw(i2c, PPI_D1S_CLRSIPOCOUNT, FLD_VAL(1, 5, 0)); FLD_VAL 371 drivers/gpu/drm/gma500/tc35876x-dsi-lvds.c tc35876x_regw(i2c, PPI_D2S_CLRSIPOCOUNT, FLD_VAL(1, 5, 0)); FLD_VAL 372 drivers/gpu/drm/gma500/tc35876x-dsi-lvds.c tc35876x_regw(i2c, PPI_D3S_CLRSIPOCOUNT, FLD_VAL(1, 5, 0)); FLD_VAL 383 drivers/gpu/drm/gma500/tc35876x-dsi-lvds.c tc35876x_regw(i2c, LVPHY0, FLD_VAL(1, 20, 16) | FLD_VAL 384 drivers/gpu/drm/gma500/tc35876x-dsi-lvds.c FLD_VAL(2, 15, 14) | FLD_VAL(6, 4, 0)); /* 0x00048006 */ FLD_VAL 390 drivers/gpu/drm/gma500/tc35876x-dsi-lvds.c tc35876x_regw(i2c, HTIM1, FLD_VAL(40, 24, 16) | FLD_VAL(40, 8, 0)); FLD_VAL 393 drivers/gpu/drm/gma500/tc35876x-dsi-lvds.c tc35876x_regw(i2c, HTIM2, FLD_VAL(80, 24, 16) | FLD_VAL(1280, 10, 0)); FLD_VAL 396 drivers/gpu/drm/gma500/tc35876x-dsi-lvds.c tc35876x_regw(i2c, VTIM1, FLD_VAL(14, 23, 16) | FLD_VAL(10, 7, 0)); FLD_VAL 399 drivers/gpu/drm/gma500/tc35876x-dsi-lvds.c tc35876x_regw(i2c, VTIM2, FLD_VAL(14, 23, 16) | FLD_VAL(800, 10, 0)); FLD_VAL 829 drivers/gpu/drm/omapdrm/dss/dispc.c h = FLD_VAL(h_coef[i].hc0_vc00, 7, 0) FLD_VAL 830 drivers/gpu/drm/omapdrm/dss/dispc.c | FLD_VAL(h_coef[i].hc1_vc0, 15, 8) FLD_VAL 831 drivers/gpu/drm/omapdrm/dss/dispc.c | FLD_VAL(h_coef[i].hc2_vc1, 23, 16) FLD_VAL 832 drivers/gpu/drm/omapdrm/dss/dispc.c | FLD_VAL(h_coef[i].hc3_vc2, 31, 24); FLD_VAL 833 drivers/gpu/drm/omapdrm/dss/dispc.c hv = FLD_VAL(h_coef[i].hc4_vc22, 7, 0) FLD_VAL 834 drivers/gpu/drm/omapdrm/dss/dispc.c | FLD_VAL(v_coef[i].hc1_vc0, 15, 8) FLD_VAL 835 drivers/gpu/drm/omapdrm/dss/dispc.c | FLD_VAL(v_coef[i].hc2_vc1, 23, 16) FLD_VAL 836 drivers/gpu/drm/omapdrm/dss/dispc.c | FLD_VAL(v_coef[i].hc3_vc2, 31, 24); FLD_VAL 851 drivers/gpu/drm/omapdrm/dss/dispc.c v = FLD_VAL(v_coef[i].hc0_vc00, 7, 0) FLD_VAL 852 drivers/gpu/drm/omapdrm/dss/dispc.c | FLD_VAL(v_coef[i].hc4_vc22, 15, 8); FLD_VAL 875 drivers/gpu/drm/omapdrm/dss/dispc.c #define CVAL(x, y) (FLD_VAL(x, 26, 16) | FLD_VAL(y, 10, 0)) FLD_VAL 893 drivers/gpu/drm/omapdrm/dss/dispc.c #define CVAL(x, y) (FLD_VAL(x, 26, 16) | FLD_VAL(y, 10, 0)) FLD_VAL 967 drivers/gpu/drm/omapdrm/dss/dispc.c val = FLD_VAL(y, 26, 16) | FLD_VAL(x, 10, 0); FLD_VAL 976 drivers/gpu/drm/omapdrm/dss/dispc.c u32 val = FLD_VAL(height - 1, 26, 16) | FLD_VAL(width - 1, 10, 0); FLD_VAL 992 drivers/gpu/drm/omapdrm/dss/dispc.c val = FLD_VAL(height - 1, 26, 16) | FLD_VAL(width - 1, 10, 0); FLD_VAL 1320 drivers/gpu/drm/omapdrm/dss/dispc.c coef_r = FLD_VAL(coefs->rr, 31, 22) | FLD_VAL(coefs->rg, 20, 11) | FLD_VAL 1321 drivers/gpu/drm/omapdrm/dss/dispc.c FLD_VAL(coefs->rb, 9, 0); FLD_VAL 1322 drivers/gpu/drm/omapdrm/dss/dispc.c coef_g = FLD_VAL(coefs->gr, 31, 22) | FLD_VAL(coefs->gg, 20, 11) | FLD_VAL 1323 drivers/gpu/drm/omapdrm/dss/dispc.c FLD_VAL(coefs->gb, 9, 0); FLD_VAL 1324 drivers/gpu/drm/omapdrm/dss/dispc.c coef_b = FLD_VAL(coefs->br, 31, 22) | FLD_VAL(coefs->bg, 20, 11) | FLD_VAL 1325 drivers/gpu/drm/omapdrm/dss/dispc.c FLD_VAL(coefs->bb, 9, 0); FLD_VAL 1364 drivers/gpu/drm/omapdrm/dss/dispc.c val = FLD_VAL(height - 1, dispc->feat->mgr_height_start, 16) | FLD_VAL 1365 drivers/gpu/drm/omapdrm/dss/dispc.c FLD_VAL(width - 1, dispc->feat->mgr_width_start, 0); FLD_VAL 1488 drivers/gpu/drm/omapdrm/dss/dispc.c FLD_VAL(high, hi_start, hi_end) | FLD_VAL 1489 drivers/gpu/drm/omapdrm/dss/dispc.c FLD_VAL(low, lo_start, lo_end)); FLD_VAL 1578 drivers/gpu/drm/omapdrm/dss/dispc.c FLD_VAL(high, 31, 16) | FLD_VAL(low, 15, 0)); FLD_VAL 1652 drivers/gpu/drm/omapdrm/dss/dispc.c val = FLD_VAL(vinc, vinc_start, vinc_end) | FLD_VAL 1653 drivers/gpu/drm/omapdrm/dss/dispc.c FLD_VAL(hinc, hinc_start, hinc_end); FLD_VAL 1657 drivers/gpu/drm/omapdrm/dss/dispc.c val = FLD_VAL(vinc, 28, 16) | FLD_VAL(hinc, 12, 0); FLD_VAL 1674 drivers/gpu/drm/omapdrm/dss/dispc.c val = FLD_VAL(vaccu, vert_start, vert_end) | FLD_VAL 1675 drivers/gpu/drm/omapdrm/dss/dispc.c FLD_VAL(haccu, hor_start, hor_end); FLD_VAL 1692 drivers/gpu/drm/omapdrm/dss/dispc.c val = FLD_VAL(vaccu, vert_start, vert_end) | FLD_VAL 1693 drivers/gpu/drm/omapdrm/dss/dispc.c FLD_VAL(haccu, hor_start, hor_end); FLD_VAL 1704 drivers/gpu/drm/omapdrm/dss/dispc.c val = FLD_VAL(vaccu, 26, 16) | FLD_VAL(haccu, 10, 0); FLD_VAL 1714 drivers/gpu/drm/omapdrm/dss/dispc.c val = FLD_VAL(vaccu, 26, 16) | FLD_VAL(haccu, 10, 0); FLD_VAL 3128 drivers/gpu/drm/omapdrm/dss/dispc.c timing_h = FLD_VAL(vm->hsync_len - 1, dispc->feat->sw_start, 0) | FLD_VAL 3129 drivers/gpu/drm/omapdrm/dss/dispc.c FLD_VAL(vm->hfront_porch - 1, dispc->feat->fp_start, 8) | FLD_VAL 3130 drivers/gpu/drm/omapdrm/dss/dispc.c FLD_VAL(vm->hback_porch - 1, dispc->feat->bp_start, 20); FLD_VAL 3131 drivers/gpu/drm/omapdrm/dss/dispc.c timing_v = FLD_VAL(vm->vsync_len - 1, dispc->feat->sw_start, 0) | FLD_VAL 3132 drivers/gpu/drm/omapdrm/dss/dispc.c FLD_VAL(vm->vfront_porch, dispc->feat->fp_start, 8) | FLD_VAL 3133 drivers/gpu/drm/omapdrm/dss/dispc.c FLD_VAL(vm->vback_porch, dispc->feat->bp_start, 20); FLD_VAL 3166 drivers/gpu/drm/omapdrm/dss/dispc.c l = FLD_VAL(onoff, 17, 17) | FLD_VAL 3167 drivers/gpu/drm/omapdrm/dss/dispc.c FLD_VAL(rf, 16, 16) | FLD_VAL 3168 drivers/gpu/drm/omapdrm/dss/dispc.c FLD_VAL(de, 15, 15) | FLD_VAL 3169 drivers/gpu/drm/omapdrm/dss/dispc.c FLD_VAL(ipc, 14, 14) | FLD_VAL 3170 drivers/gpu/drm/omapdrm/dss/dispc.c FLD_VAL(hs, 13, 13) | FLD_VAL 3171 drivers/gpu/drm/omapdrm/dss/dispc.c FLD_VAL(vs, 12, 12); FLD_VAL 3267 drivers/gpu/drm/omapdrm/dss/dispc.c FLD_VAL(lck_div, 23, 16) | FLD_VAL(pck_div, 7, 0)); FLD_VAL 2162 drivers/gpu/drm/omapdrm/dss/dsi.c v = FLD_VAL(add, 2, 0) | FLD_VAL(size, 7, 4); FLD_VAL 2194 drivers/gpu/drm/omapdrm/dss/dsi.c v = FLD_VAL(add, 2, 0) | FLD_VAL(size, 7, 4); FLD_VAL 2599 drivers/gpu/drm/omapdrm/dss/dsi.c val = FLD_VAL(data_id, 7, 0) | FLD_VAL(len, 23, 8) | FLD_VAL 2600 drivers/gpu/drm/omapdrm/dss/dsi.c FLD_VAL(ecc, 31, 24); FLD_VAL 3605 drivers/gpu/drm/omapdrm/dss/dsi.c r = FLD_VAL(enter_hs_mode_lat, 31, 16) | FLD_VAL 3606 drivers/gpu/drm/omapdrm/dss/dsi.c FLD_VAL(exit_hs_mode_lat, 15, 0); FLD_VAL 3846 drivers/gpu/drm/omapdrm/dss/dsi.c l = FLD_VAL(total_len, 23, 0); /* TE_SIZE */ FLD_VAL 68 drivers/gpu/drm/omapdrm/dss/dss.h (((orig) & ~FLD_MASK(start, end)) | FLD_VAL(val, start, end)) FLD_VAL 138 drivers/gpu/drm/omapdrm/dss/hdmi_wp.c l |= FLD_VAL(video_fmt->y_res, 31, 16); FLD_VAL 139 drivers/gpu/drm/omapdrm/dss/hdmi_wp.c l |= FLD_VAL(video_fmt->x_res, 15, 0); FLD_VAL 181 drivers/gpu/drm/omapdrm/dss/hdmi_wp.c timing_h |= FLD_VAL(vm->hback_porch, 31, 20); FLD_VAL 182 drivers/gpu/drm/omapdrm/dss/hdmi_wp.c timing_h |= FLD_VAL(vm->hfront_porch, 19, 8); FLD_VAL 183 drivers/gpu/drm/omapdrm/dss/hdmi_wp.c timing_h |= FLD_VAL(vm->hsync_len - hsync_len_offset, 7, 0); FLD_VAL 186 drivers/gpu/drm/omapdrm/dss/hdmi_wp.c timing_v |= FLD_VAL(vm->vback_porch, 31, 20); FLD_VAL 187 drivers/gpu/drm/omapdrm/dss/hdmi_wp.c timing_v |= FLD_VAL(vm->vfront_porch, 19, 8); FLD_VAL 188 drivers/gpu/drm/omapdrm/dss/hdmi_wp.c timing_v |= FLD_VAL(vm->vsync_len, 7, 0); FLD_VAL 656 drivers/video/fbdev/omap2/omapfb/dss/dispc.c h = FLD_VAL(h_coef[i].hc0_vc00, 7, 0) FLD_VAL 657 drivers/video/fbdev/omap2/omapfb/dss/dispc.c | FLD_VAL(h_coef[i].hc1_vc0, 15, 8) FLD_VAL 658 drivers/video/fbdev/omap2/omapfb/dss/dispc.c | FLD_VAL(h_coef[i].hc2_vc1, 23, 16) FLD_VAL 659 drivers/video/fbdev/omap2/omapfb/dss/dispc.c | FLD_VAL(h_coef[i].hc3_vc2, 31, 24); FLD_VAL 660 drivers/video/fbdev/omap2/omapfb/dss/dispc.c hv = FLD_VAL(h_coef[i].hc4_vc22, 7, 0) FLD_VAL 661 drivers/video/fbdev/omap2/omapfb/dss/dispc.c | FLD_VAL(v_coef[i].hc1_vc0, 15, 8) FLD_VAL 662 drivers/video/fbdev/omap2/omapfb/dss/dispc.c | FLD_VAL(v_coef[i].hc2_vc1, 23, 16) FLD_VAL 663 drivers/video/fbdev/omap2/omapfb/dss/dispc.c | FLD_VAL(v_coef[i].hc3_vc2, 31, 24); FLD_VAL 678 drivers/video/fbdev/omap2/omapfb/dss/dispc.c v = FLD_VAL(v_coef[i].hc0_vc00, 7, 0) FLD_VAL 679 drivers/video/fbdev/omap2/omapfb/dss/dispc.c | FLD_VAL(v_coef[i].hc4_vc22, 15, 8); FLD_VAL 692 drivers/video/fbdev/omap2/omapfb/dss/dispc.c #define CVAL(x, y) (FLD_VAL(x, 26, 16) | FLD_VAL(y, 10, 0)) FLD_VAL 753 drivers/video/fbdev/omap2/omapfb/dss/dispc.c val = FLD_VAL(y, 26, 16) | FLD_VAL(x, 10, 0); FLD_VAL 761 drivers/video/fbdev/omap2/omapfb/dss/dispc.c u32 val = FLD_VAL(height - 1, 26, 16) | FLD_VAL(width - 1, 10, 0); FLD_VAL 776 drivers/video/fbdev/omap2/omapfb/dss/dispc.c val = FLD_VAL(height - 1, 26, 16) | FLD_VAL(width - 1, 10, 0); FLD_VAL 1097 drivers/video/fbdev/omap2/omapfb/dss/dispc.c coef_r = FLD_VAL(coefs->rr, 31, 22) | FLD_VAL(coefs->rg, 20, 11) | FLD_VAL 1098 drivers/video/fbdev/omap2/omapfb/dss/dispc.c FLD_VAL(coefs->rb, 9, 0); FLD_VAL 1099 drivers/video/fbdev/omap2/omapfb/dss/dispc.c coef_g = FLD_VAL(coefs->gr, 31, 22) | FLD_VAL(coefs->gg, 20, 11) | FLD_VAL 1100 drivers/video/fbdev/omap2/omapfb/dss/dispc.c FLD_VAL(coefs->gb, 9, 0); FLD_VAL 1101 drivers/video/fbdev/omap2/omapfb/dss/dispc.c coef_b = FLD_VAL(coefs->br, 31, 22) | FLD_VAL(coefs->bg, 20, 11) | FLD_VAL 1102 drivers/video/fbdev/omap2/omapfb/dss/dispc.c FLD_VAL(coefs->bb, 9, 0); FLD_VAL 1138 drivers/video/fbdev/omap2/omapfb/dss/dispc.c val = FLD_VAL(height - 1, dispc.feat->mgr_height_start, 16) | FLD_VAL 1139 drivers/video/fbdev/omap2/omapfb/dss/dispc.c FLD_VAL(width - 1, dispc.feat->mgr_width_start, 0); FLD_VAL 1255 drivers/video/fbdev/omap2/omapfb/dss/dispc.c FLD_VAL(high, hi_start, hi_end) | FLD_VAL 1256 drivers/video/fbdev/omap2/omapfb/dss/dispc.c FLD_VAL(low, lo_start, lo_end)); FLD_VAL 1342 drivers/video/fbdev/omap2/omapfb/dss/dispc.c FLD_VAL(high, 31, 16) | FLD_VAL(low, 15, 0)); FLD_VAL 1415 drivers/video/fbdev/omap2/omapfb/dss/dispc.c val = FLD_VAL(vinc, vinc_start, vinc_end) | FLD_VAL 1416 drivers/video/fbdev/omap2/omapfb/dss/dispc.c FLD_VAL(hinc, hinc_start, hinc_end); FLD_VAL 1420 drivers/video/fbdev/omap2/omapfb/dss/dispc.c val = FLD_VAL(vinc, 28, 16) | FLD_VAL(hinc, 12, 0); FLD_VAL 1433 drivers/video/fbdev/omap2/omapfb/dss/dispc.c val = FLD_VAL(vaccu, vert_start, vert_end) | FLD_VAL 1434 drivers/video/fbdev/omap2/omapfb/dss/dispc.c FLD_VAL(haccu, hor_start, hor_end); FLD_VAL 1447 drivers/video/fbdev/omap2/omapfb/dss/dispc.c val = FLD_VAL(vaccu, vert_start, vert_end) | FLD_VAL 1448 drivers/video/fbdev/omap2/omapfb/dss/dispc.c FLD_VAL(haccu, hor_start, hor_end); FLD_VAL 1458 drivers/video/fbdev/omap2/omapfb/dss/dispc.c val = FLD_VAL(vaccu, 26, 16) | FLD_VAL(haccu, 10, 0); FLD_VAL 1467 drivers/video/fbdev/omap2/omapfb/dss/dispc.c val = FLD_VAL(vaccu, 26, 16) | FLD_VAL(haccu, 10, 0); FLD_VAL 3143 drivers/video/fbdev/omap2/omapfb/dss/dispc.c timing_h = FLD_VAL(hsw-1, dispc.feat->sw_start, 0) | FLD_VAL 3144 drivers/video/fbdev/omap2/omapfb/dss/dispc.c FLD_VAL(hfp-1, dispc.feat->fp_start, 8) | FLD_VAL 3145 drivers/video/fbdev/omap2/omapfb/dss/dispc.c FLD_VAL(hbp-1, dispc.feat->bp_start, 20); FLD_VAL 3146 drivers/video/fbdev/omap2/omapfb/dss/dispc.c timing_v = FLD_VAL(vsw-1, dispc.feat->sw_start, 0) | FLD_VAL 3147 drivers/video/fbdev/omap2/omapfb/dss/dispc.c FLD_VAL(vfp, dispc.feat->fp_start, 8) | FLD_VAL 3148 drivers/video/fbdev/omap2/omapfb/dss/dispc.c FLD_VAL(vbp, dispc.feat->bp_start, 20); FLD_VAL 3211 drivers/video/fbdev/omap2/omapfb/dss/dispc.c l = FLD_VAL(onoff, 17, 17) | FLD_VAL 3212 drivers/video/fbdev/omap2/omapfb/dss/dispc.c FLD_VAL(rf, 16, 16) | FLD_VAL 3213 drivers/video/fbdev/omap2/omapfb/dss/dispc.c FLD_VAL(de, 15, 15) | FLD_VAL 3214 drivers/video/fbdev/omap2/omapfb/dss/dispc.c FLD_VAL(ipc, 14, 14) | FLD_VAL 3215 drivers/video/fbdev/omap2/omapfb/dss/dispc.c FLD_VAL(hs, 13, 13) | FLD_VAL 3216 drivers/video/fbdev/omap2/omapfb/dss/dispc.c FLD_VAL(vs, 12, 12); FLD_VAL 3294 drivers/video/fbdev/omap2/omapfb/dss/dispc.c FLD_VAL(lck_div, 23, 16) | FLD_VAL(pck_div, 7, 0)); FLD_VAL 2211 drivers/video/fbdev/omap2/omapfb/dss/dsi.c v = FLD_VAL(add, 2, 0) | FLD_VAL(size, 7, 4); FLD_VAL 2244 drivers/video/fbdev/omap2/omapfb/dss/dsi.c v = FLD_VAL(add, 2, 0) | FLD_VAL(size, 7, 4); FLD_VAL 2662 drivers/video/fbdev/omap2/omapfb/dss/dsi.c val = FLD_VAL(data_id, 7, 0) | FLD_VAL(len, 23, 8) | FLD_VAL 2663 drivers/video/fbdev/omap2/omapfb/dss/dsi.c FLD_VAL(ecc, 31, 24); FLD_VAL 3681 drivers/video/fbdev/omap2/omapfb/dss/dsi.c r = FLD_VAL(enter_hs_mode_lat, 31, 16) | FLD_VAL 3682 drivers/video/fbdev/omap2/omapfb/dss/dsi.c FLD_VAL(exit_hs_mode_lat, 15, 0); FLD_VAL 3936 drivers/video/fbdev/omap2/omapfb/dss/dsi.c l = FLD_VAL(total_len, 23, 0); /* TE_SIZE */ FLD_VAL 63 drivers/video/fbdev/omap2/omapfb/dss/dss.h (((orig) & ~FLD_MASK(start, end)) | FLD_VAL(val, start, end)) FLD_VAL 139 drivers/video/fbdev/omap2/omapfb/dss/hdmi_wp.c l |= FLD_VAL(video_fmt->y_res, 31, 16); FLD_VAL 140 drivers/video/fbdev/omap2/omapfb/dss/hdmi_wp.c l |= FLD_VAL(video_fmt->x_res, 15, 0); FLD_VAL 170 drivers/video/fbdev/omap2/omapfb/dss/hdmi_wp.c timing_h |= FLD_VAL(timings->hbp, 31, 20); FLD_VAL 171 drivers/video/fbdev/omap2/omapfb/dss/hdmi_wp.c timing_h |= FLD_VAL(timings->hfp, 19, 8); FLD_VAL 172 drivers/video/fbdev/omap2/omapfb/dss/hdmi_wp.c timing_h |= FLD_VAL(timings->hsw, 7, 0); FLD_VAL 175 drivers/video/fbdev/omap2/omapfb/dss/hdmi_wp.c timing_v |= FLD_VAL(timings->vbp, 31, 20); FLD_VAL 176 drivers/video/fbdev/omap2/omapfb/dss/hdmi_wp.c timing_v |= FLD_VAL(timings->vfp, 19, 8); FLD_VAL 177 drivers/video/fbdev/omap2/omapfb/dss/hdmi_wp.c timing_v |= FLD_VAL(timings->vsw, 7, 0);