FIELD 181 arch/sparc/net/bpf_jit_comp_32.c #define emit_loadptr(BASE, STRUCT, FIELD, DEST) \ FIELD 182 arch/sparc/net/bpf_jit_comp_32.c do { unsigned int _off = offsetof(STRUCT, FIELD); \ FIELD 183 arch/sparc/net/bpf_jit_comp_32.c BUILD_BUG_ON(FIELD_SIZEOF(STRUCT, FIELD) != sizeof(void *)); \ FIELD 187 arch/sparc/net/bpf_jit_comp_32.c #define emit_load32(BASE, STRUCT, FIELD, DEST) \ FIELD 188 arch/sparc/net/bpf_jit_comp_32.c do { unsigned int _off = offsetof(STRUCT, FIELD); \ FIELD 189 arch/sparc/net/bpf_jit_comp_32.c BUILD_BUG_ON(FIELD_SIZEOF(STRUCT, FIELD) != sizeof(u32)); \ FIELD 193 arch/sparc/net/bpf_jit_comp_32.c #define emit_load16(BASE, STRUCT, FIELD, DEST) \ FIELD 194 arch/sparc/net/bpf_jit_comp_32.c do { unsigned int _off = offsetof(STRUCT, FIELD); \ FIELD 195 arch/sparc/net/bpf_jit_comp_32.c BUILD_BUG_ON(FIELD_SIZEOF(STRUCT, FIELD) != sizeof(u16)); \ FIELD 199 arch/sparc/net/bpf_jit_comp_32.c #define __emit_load8(BASE, STRUCT, FIELD, DEST) \ FIELD 200 arch/sparc/net/bpf_jit_comp_32.c do { unsigned int _off = offsetof(STRUCT, FIELD); \ FIELD 204 arch/sparc/net/bpf_jit_comp_32.c #define emit_load8(BASE, STRUCT, FIELD, DEST) \ FIELD 205 arch/sparc/net/bpf_jit_comp_32.c do { BUILD_BUG_ON(FIELD_SIZEOF(STRUCT, FIELD) != sizeof(u8)); \ FIELD 206 arch/sparc/net/bpf_jit_comp_32.c __emit_load8(BASE, STRUCT, FIELD, DEST); \ FIELD 226 arch/sparc/net/bpf_jit_comp_32.c #define emit_skb_loadptr(FIELD, DEST) \ FIELD 227 arch/sparc/net/bpf_jit_comp_32.c emit_loadptr(r_SKB, struct sk_buff, FIELD, DEST) FIELD 228 arch/sparc/net/bpf_jit_comp_32.c #define emit_skb_load32(FIELD, DEST) \ FIELD 229 arch/sparc/net/bpf_jit_comp_32.c emit_load32(r_SKB, struct sk_buff, FIELD, DEST) FIELD 230 arch/sparc/net/bpf_jit_comp_32.c #define emit_skb_load16(FIELD, DEST) \ FIELD 231 arch/sparc/net/bpf_jit_comp_32.c emit_load16(r_SKB, struct sk_buff, FIELD, DEST) FIELD 232 arch/sparc/net/bpf_jit_comp_32.c #define __emit_skb_load8(FIELD, DEST) \ FIELD 233 arch/sparc/net/bpf_jit_comp_32.c __emit_load8(r_SKB, struct sk_buff, FIELD, DEST) FIELD 234 arch/sparc/net/bpf_jit_comp_32.c #define emit_skb_load8(FIELD, DEST) \ FIELD 235 arch/sparc/net/bpf_jit_comp_32.c emit_load8(r_SKB, struct sk_buff, FIELD, DEST) FIELD 87 arch/unicore32/include/asm/gpio.h if ((gpio < IRQ_GPIOHIGH) && (FIELD(1, 1, gpio) & readl(GPIO_GPIR))) FIELD 17 arch/unicore32/include/mach/regs-ac97.h #define AC97_CODEC_REG(v) FIELD((v), 7, 16) FIELD 18 arch/unicore32/include/mach/regs-ac97.h #define AC97_CODEC_VAL(v) FIELD((v), 16, 0) FIELD 19 arch/unicore32/include/mach/regs-ac97.h #define AC97_CODEC_WRITECOMPLETE FIELD(1, 1, 2) FIELD 24 arch/unicore32/include/mach/regs-ac97.h #define AC97_CMD_VPSAMPLE (FIELD(3, 2, 16) | FIELD(3, 2, 0)) FIELD 29 arch/unicore32/include/mach/regs-ac97.h #define AC97_CMD_FCSAMPLE FIELD(7, 3, 0) FIELD 31 arch/unicore32/include/mach/regs-ac97.h #define AC97_CMD_RESET FIELD(1, 1, 0) FIELD 32 arch/unicore32/include/mach/regs-ac97.h #define AC97_CMD_ENABLE FIELD(1, 1, 0) FIELD 33 arch/unicore32/include/mach/regs-ac97.h #define AC97_CMD_DISABLE FIELD(0, 1, 0) FIELD 57 arch/unicore32/include/mach/regs-dmac.h #define DMAC_CHANNEL(ch) FIELD(1, 1, (ch)) FIELD 59 arch/unicore32/include/mach/regs-dmac.h #define DMAC_CONTROL_SIZE_BYTE(v) (FIELD((v), 12, 14) | \ FIELD 60 arch/unicore32/include/mach/regs-dmac.h FIELD(0, 3, 9) | FIELD(0, 3, 6)) FIELD 61 arch/unicore32/include/mach/regs-dmac.h #define DMAC_CONTROL_SIZE_HWORD(v) (FIELD((v) >> 1, 12, 14) | \ FIELD 62 arch/unicore32/include/mach/regs-dmac.h FIELD(1, 3, 9) | FIELD(1, 3, 6)) FIELD 63 arch/unicore32/include/mach/regs-dmac.h #define DMAC_CONTROL_SIZE_WORD(v) (FIELD((v) >> 2, 12, 14) | \ FIELD 64 arch/unicore32/include/mach/regs-dmac.h FIELD(2, 3, 9) | FIELD(2, 3, 6)) FIELD 65 arch/unicore32/include/mach/regs-dmac.h #define DMAC_CONTROL_DI FIELD(1, 1, 13) FIELD 66 arch/unicore32/include/mach/regs-dmac.h #define DMAC_CONTROL_SI FIELD(1, 1, 12) FIELD 67 arch/unicore32/include/mach/regs-dmac.h #define DMAC_CONTROL_BURST_1BYTE (FIELD(0, 3, 3) | FIELD(0, 3, 0)) FIELD 68 arch/unicore32/include/mach/regs-dmac.h #define DMAC_CONTROL_BURST_4BYTE (FIELD(3, 3, 3) | FIELD(3, 3, 0)) FIELD 69 arch/unicore32/include/mach/regs-dmac.h #define DMAC_CONTROL_BURST_8BYTE (FIELD(5, 3, 3) | FIELD(5, 3, 0)) FIELD 70 arch/unicore32/include/mach/regs-dmac.h #define DMAC_CONTROL_BURST_16BYTE (FIELD(7, 3, 3) | FIELD(7, 3, 0)) FIELD 72 arch/unicore32/include/mach/regs-dmac.h #define DMAC_CONFIG_UART0_WR (FIELD(2, 4, 11) | FIELD(1, 2, 1)) FIELD 73 arch/unicore32/include/mach/regs-dmac.h #define DMAC_CONFIG_UART0_RD (FIELD(2, 4, 7) | FIELD(2, 2, 1)) FIELD 74 arch/unicore32/include/mach/regs-dmac.h #define DMAC_CONFIG_UART1_WR (FIELD(3, 4, 11) | FIELD(1, 2, 1)) FIELD 75 arch/unicore32/include/mach/regs-dmac.h #define DMAC_CONFIG_UART1RD (FIELD(3, 4, 7) | FIELD(2, 2, 1)) FIELD 76 arch/unicore32/include/mach/regs-dmac.h #define DMAC_CONFIG_AC97WR (FIELD(4, 4, 11) | FIELD(1, 2, 1)) FIELD 77 arch/unicore32/include/mach/regs-dmac.h #define DMAC_CONFIG_AC97RD (FIELD(4, 4, 7) | FIELD(2, 2, 1)) FIELD 78 arch/unicore32/include/mach/regs-dmac.h #define DMAC_CONFIG_MMCWR (FIELD(7, 4, 11) | FIELD(1, 2, 1)) FIELD 79 arch/unicore32/include/mach/regs-dmac.h #define DMAC_CONFIG_MMCRD (FIELD(7, 4, 7) | FIELD(2, 2, 1)) FIELD 80 arch/unicore32/include/mach/regs-dmac.h #define DMAC_CONFIG_MASKITC FIELD(1, 1, 4) FIELD 81 arch/unicore32/include/mach/regs-dmac.h #define DMAC_CONFIG_MASKIE FIELD(1, 1, 3) FIELD 82 arch/unicore32/include/mach/regs-dmac.h #define DMAC_CONFIG_EN FIELD(1, 1, 0) FIELD 39 arch/unicore32/include/mach/regs-i2c.h #define I2C_CON_MASTER FIELD(1, 1, 0) FIELD 40 arch/unicore32/include/mach/regs-i2c.h #define I2C_CON_SPEED_STD FIELD(1, 2, 1) FIELD 41 arch/unicore32/include/mach/regs-i2c.h #define I2C_CON_SPEED_FAST FIELD(2, 2, 1) FIELD 42 arch/unicore32/include/mach/regs-i2c.h #define I2C_CON_RESTART FIELD(1, 1, 5) FIELD 43 arch/unicore32/include/mach/regs-i2c.h #define I2C_CON_SLAVEDISABLE FIELD(1, 1, 6) FIELD 45 arch/unicore32/include/mach/regs-i2c.h #define I2C_DATACMD_READ FIELD(1, 1, 8) FIELD 46 arch/unicore32/include/mach/regs-i2c.h #define I2C_DATACMD_WRITE FIELD(0, 1, 8) FIELD 48 arch/unicore32/include/mach/regs-i2c.h #define I2C_DATACMD_DAT(v) FIELD((v), 8, 0) FIELD 50 arch/unicore32/include/mach/regs-i2c.h #define I2C_ENABLE_ENABLE FIELD(1, 1, 0) FIELD 51 arch/unicore32/include/mach/regs-i2c.h #define I2C_ENABLE_DISABLE FIELD(0, 1, 0) FIELD 53 arch/unicore32/include/mach/regs-i2c.h #define I2C_STATUS_RFF FIELD(1, 1, 4) FIELD 54 arch/unicore32/include/mach/regs-i2c.h #define I2C_STATUS_RFNE FIELD(1, 1, 3) FIELD 55 arch/unicore32/include/mach/regs-i2c.h #define I2C_STATUS_TFE FIELD(1, 1, 2) FIELD 56 arch/unicore32/include/mach/regs-i2c.h #define I2C_STATUS_TFNF FIELD(1, 1, 1) FIELD 57 arch/unicore32/include/mach/regs-i2c.h #define I2C_STATUS_ACTIVITY FIELD(1, 1, 0) FIELD 59 arch/unicore32/include/mach/regs-i2c.h #define I2C_ENSTATUS_ENABLE FIELD(1, 1, 0) FIELD 74 arch/unicore32/include/mach/regs-nand.h #define NAND_CMD_CMD_READPAGE FIELD(0x0, 4, 4) FIELD 75 arch/unicore32/include/mach/regs-nand.h #define NAND_CMD_CMD_ERASEBLOCK FIELD(0x6, 4, 4) FIELD 76 arch/unicore32/include/mach/regs-nand.h #define NAND_CMD_CMD_READSTATUS FIELD(0x7, 4, 4) FIELD 77 arch/unicore32/include/mach/regs-nand.h #define NAND_CMD_CMD_WRITEPAGE FIELD(0x8, 4, 4) FIELD 78 arch/unicore32/include/mach/regs-nand.h #define NAND_CMD_CMD_READID FIELD(0x9, 4, 4) FIELD 79 arch/unicore32/include/mach/regs-nand.h #define NAND_CMD_CMD_RESET FIELD(0xf, 4, 4) FIELD 51 arch/unicore32/include/mach/regs-ost.h #define OST_OSSR_M0 FIELD(1, 1, 0) FIELD 55 arch/unicore32/include/mach/regs-ost.h #define OST_OSSR_M1 FIELD(1, 1, 1) FIELD 59 arch/unicore32/include/mach/regs-ost.h #define OST_OSSR_M2 FIELD(1, 1, 2) FIELD 63 arch/unicore32/include/mach/regs-ost.h #define OST_OSSR_M3 FIELD(1, 1, 3) FIELD 68 arch/unicore32/include/mach/regs-ost.h #define OST_OIER_E0 FIELD(1, 1, 0) FIELD 72 arch/unicore32/include/mach/regs-ost.h #define OST_OIER_E1 FIELD(1, 1, 1) FIELD 76 arch/unicore32/include/mach/regs-ost.h #define OST_OIER_E2 FIELD(1, 1, 2) FIELD 80 arch/unicore32/include/mach/regs-ost.h #define OST_OIER_E3 FIELD(1, 1, 3) FIELD 85 arch/unicore32/include/mach/regs-ost.h #define OST_OWER_WME FIELD(1, 1, 0) FIELD 90 arch/unicore32/include/mach/regs-ost.h #define OST_PWMDCCR_FDCYCLE FIELD(1, 1, 10) FIELD 86 arch/unicore32/include/mach/regs-pci.h #define PCIBRI_CTLx_AT FIELD(1, 1, 2) FIELD 87 arch/unicore32/include/mach/regs-pci.h #define PCIBRI_CTLx_PREF FIELD(1, 1, 1) FIELD 88 arch/unicore32/include/mach/regs-pci.h #define PCIBRI_CTLx_MRL FIELD(1, 1, 0) FIELD 90 arch/unicore32/include/mach/regs-pci.h #define PCIBRI_BARx_ADDR FIELD(0xFFFFFFFC, 30, 2) FIELD 91 arch/unicore32/include/mach/regs-pci.h #define PCIBRI_BARx_IO FIELD(1, 1, 0) FIELD 92 arch/unicore32/include/mach/regs-pci.h #define PCIBRI_BARx_MEM FIELD(0, 1, 0) FIELD 94 arch/unicore32/include/mach/regs-pci.h #define PCIBRI_CMD_IO FIELD(1, 1, 0) FIELD 95 arch/unicore32/include/mach/regs-pci.h #define PCIBRI_CMD_MEM FIELD(1, 1, 1) FIELD 78 arch/unicore32/include/mach/regs-pm.h #define PM_PMCR_SFB FIELD(1, 1, 0) FIELD 79 arch/unicore32/include/mach/regs-pm.h #define PM_PMCR_IFB FIELD(1, 1, 1) FIELD 80 arch/unicore32/include/mach/regs-pm.h #define PM_PMCR_CFBSYS FIELD(1, 1, 2) FIELD 81 arch/unicore32/include/mach/regs-pm.h #define PM_PMCR_CFBDDR FIELD(1, 1, 3) FIELD 82 arch/unicore32/include/mach/regs-pm.h #define PM_PMCR_CFBVGA FIELD(1, 1, 4) FIELD 83 arch/unicore32/include/mach/regs-pm.h #define PM_PMCR_CFBDIVBCLK FIELD(1, 1, 5) FIELD 88 arch/unicore32/include/mach/regs-pm.h #define PM_PWER_GPIOHIGH FIELD(1, 1, 8) FIELD 92 arch/unicore32/include/mach/regs-pm.h #define PM_PWER_RTC FIELD(1, 1, 31) FIELD 94 arch/unicore32/include/mach/regs-pm.h #define PM_PCGR_BCLK64DDR FIELD(1, 1, 0) FIELD 95 arch/unicore32/include/mach/regs-pm.h #define PM_PCGR_BCLK64VGA FIELD(1, 1, 1) FIELD 96 arch/unicore32/include/mach/regs-pm.h #define PM_PCGR_BCLKDDR FIELD(1, 1, 2) FIELD 97 arch/unicore32/include/mach/regs-pm.h #define PM_PCGR_BCLKPCI FIELD(1, 1, 4) FIELD 98 arch/unicore32/include/mach/regs-pm.h #define PM_PCGR_BCLKDMAC FIELD(1, 1, 5) FIELD 99 arch/unicore32/include/mach/regs-pm.h #define PM_PCGR_BCLKUMAL FIELD(1, 1, 6) FIELD 100 arch/unicore32/include/mach/regs-pm.h #define PM_PCGR_BCLKUSB FIELD(1, 1, 7) FIELD 101 arch/unicore32/include/mach/regs-pm.h #define PM_PCGR_BCLKMME FIELD(1, 1, 10) FIELD 102 arch/unicore32/include/mach/regs-pm.h #define PM_PCGR_BCLKNAND FIELD(1, 1, 11) FIELD 103 arch/unicore32/include/mach/regs-pm.h #define PM_PCGR_BCLKH264E FIELD(1, 1, 12) FIELD 104 arch/unicore32/include/mach/regs-pm.h #define PM_PCGR_BCLKVGA FIELD(1, 1, 13) FIELD 105 arch/unicore32/include/mach/regs-pm.h #define PM_PCGR_BCLKH264D FIELD(1, 1, 14) FIELD 106 arch/unicore32/include/mach/regs-pm.h #define PM_PCGR_VECLK FIELD(1, 1, 15) FIELD 107 arch/unicore32/include/mach/regs-pm.h #define PM_PCGR_HECLK FIELD(1, 1, 16) FIELD 108 arch/unicore32/include/mach/regs-pm.h #define PM_PCGR_HDCLK FIELD(1, 1, 17) FIELD 109 arch/unicore32/include/mach/regs-pm.h #define PM_PCGR_NANDCLK FIELD(1, 1, 18) FIELD 110 arch/unicore32/include/mach/regs-pm.h #define PM_PCGR_GECLK FIELD(1, 1, 19) FIELD 111 arch/unicore32/include/mach/regs-pm.h #define PM_PCGR_VGACLK FIELD(1, 1, 20) FIELD 112 arch/unicore32/include/mach/regs-pm.h #define PM_PCGR_PCICLK FIELD(1, 1, 21) FIELD 113 arch/unicore32/include/mach/regs-pm.h #define PM_PCGR_SATACLK FIELD(1, 1, 25) FIELD 119 arch/unicore32/include/mach/regs-pm.h #define PM_DIVCFG_VGACLK(v) FIELD((v), 4, 20) FIELD 121 arch/unicore32/include/mach/regs-pm.h #define PM_SWRESET_USB FIELD(1, 1, 6) FIELD 122 arch/unicore32/include/mach/regs-pm.h #define PM_SWRESET_VGADIV FIELD(1, 1, 26) FIELD 123 arch/unicore32/include/mach/regs-pm.h #define PM_SWRESET_GEDIV FIELD(1, 1, 27) FIELD 125 arch/unicore32/include/mach/regs-pm.h #define PM_PLLDFCDONE_SYSDFC FIELD(1, 1, 0) FIELD 126 arch/unicore32/include/mach/regs-pm.h #define PM_PLLDFCDONE_DDRDFC FIELD(1, 1, 1) FIELD 127 arch/unicore32/include/mach/regs-pm.h #define PM_PLLDFCDONE_VGADFC FIELD(1, 1, 2) FIELD 17 arch/unicore32/include/mach/regs-resetc.h #define RESETC_SWRR_SRB FIELD(1, 1, 0) FIELD 22 arch/unicore32/include/mach/regs-resetc.h #define RESETC_RSSR_HWR FIELD(1, 1, 0) FIELD 26 arch/unicore32/include/mach/regs-resetc.h #define RESETC_RSSR_SWR FIELD(1, 1, 1) FIELD 30 arch/unicore32/include/mach/regs-resetc.h #define RESETC_RSSR_WDR FIELD(1, 1, 2) FIELD 34 arch/unicore32/include/mach/regs-resetc.h #define RESETC_RSSR_SMR FIELD(1, 1, 3) FIELD 25 arch/unicore32/include/mach/regs-rtc.h #define RTC_RTSR_AL FIELD(1, 1, 0) FIELD 29 arch/unicore32/include/mach/regs-rtc.h #define RTC_RTSR_HZ FIELD(1, 1, 1) FIELD 33 arch/unicore32/include/mach/regs-rtc.h #define RTC_RTSR_ALE FIELD(1, 1, 2) FIELD 37 arch/unicore32/include/mach/regs-rtc.h #define RTC_RTSR_HZE FIELD(1, 1, 3) FIELD 73 arch/unicore32/include/mach/regs-sdc.h #define SDC_CCR_CLKEN FIELD(1, 1, 2) FIELD 77 arch/unicore32/include/mach/regs-sdc.h #define SDC_CCR_PDIV(v) FIELD((v), 8, 8) FIELD 82 arch/unicore32/include/mach/regs-sdc.h #define SDC_SRR_ENABLE FIELD(0, 1, 0) FIELD 86 arch/unicore32/include/mach/regs-sdc.h #define SDC_SRR_DISABLE FIELD(1, 1, 0) FIELD 95 arch/unicore32/include/mach/regs-sdc.h #define SDC_COMMAND_RESTYPE_NONE FIELD(0, 2, 0) FIELD 99 arch/unicore32/include/mach/regs-sdc.h #define SDC_COMMAND_RESTYPE_LONG FIELD(1, 2, 0) FIELD 103 arch/unicore32/include/mach/regs-sdc.h #define SDC_COMMAND_RESTYPE_SHORT FIELD(2, 2, 0) FIELD 107 arch/unicore32/include/mach/regs-sdc.h #define SDC_COMMAND_RESTYPE_SHORTBUSY FIELD(3, 2, 0) FIELD 111 arch/unicore32/include/mach/regs-sdc.h #define SDC_COMMAND_DATAREADY FIELD(1, 1, 2) FIELD 112 arch/unicore32/include/mach/regs-sdc.h #define SDC_COMMAND_CMDEN FIELD(1, 1, 3) FIELD 116 arch/unicore32/include/mach/regs-sdc.h #define SDC_COMMAND_CMDINDEX(v) FIELD((v), 6, 5) FIELD 121 arch/unicore32/include/mach/regs-sdc.h #define SDC_BLOCKSIZE_BSMASK(v) FIELD((v), 11, 0) FIELD 125 arch/unicore32/include/mach/regs-sdc.h #define SDC_BLOCKCOUNT_BCMASK(v) FIELD((v), 12, 0) FIELD 130 arch/unicore32/include/mach/regs-sdc.h #define SDC_TMR_WTH_1BIT FIELD(0, 1, 0) FIELD 134 arch/unicore32/include/mach/regs-sdc.h #define SDC_TMR_WTH_4BIT FIELD(1, 1, 0) FIELD 138 arch/unicore32/include/mach/regs-sdc.h #define SDC_TMR_DIR_READ FIELD(0, 1, 1) FIELD 142 arch/unicore32/include/mach/regs-sdc.h #define SDC_TMR_DIR_WRITE FIELD(1, 1, 1) FIELD 145 arch/unicore32/include/mach/regs-sdc.h #define SDC_IR_RESTIMEOUT FIELD(1, 1, 0) FIELD 146 arch/unicore32/include/mach/regs-sdc.h #define SDC_IR_WRITECRC FIELD(1, 1, 1) FIELD 147 arch/unicore32/include/mach/regs-sdc.h #define SDC_IR_READCRC FIELD(1, 1, 2) FIELD 148 arch/unicore32/include/mach/regs-sdc.h #define SDC_IR_TXFIFOREAD FIELD(1, 1, 3) FIELD 149 arch/unicore32/include/mach/regs-sdc.h #define SDC_IR_RXFIFOWRITE FIELD(1, 1, 4) FIELD 150 arch/unicore32/include/mach/regs-sdc.h #define SDC_IR_READTIMEOUT FIELD(1, 1, 5) FIELD 151 arch/unicore32/include/mach/regs-sdc.h #define SDC_IR_DATACOMPLETE FIELD(1, 1, 6) FIELD 152 arch/unicore32/include/mach/regs-sdc.h #define SDC_IR_CMDCOMPLETE FIELD(1, 1, 7) FIELD 153 arch/unicore32/include/mach/regs-sdc.h #define SDC_IR_RXFIFOFULL FIELD(1, 1, 8) FIELD 154 arch/unicore32/include/mach/regs-sdc.h #define SDC_IR_RXFIFOEMPTY FIELD(1, 1, 9) FIELD 155 arch/unicore32/include/mach/regs-sdc.h #define SDC_IR_TXFIFOFULL FIELD(1, 1, 10) FIELD 156 arch/unicore32/include/mach/regs-sdc.h #define SDC_IR_TXFIFOEMPTY FIELD(1, 1, 11) FIELD 157 arch/unicore32/include/mach/regs-sdc.h #define SDC_IR_ENDCMDWITHRES FIELD(1, 1, 12) FIELD 33 arch/unicore32/include/mach/regs-spi.h #define SPI_SSIENR_EN FIELD(1, 1, 0) FIELD 38 arch/unicore32/include/mach/regs-spi.h #define SPI_SR_BUSY FIELD(1, 1, 0) FIELD 42 arch/unicore32/include/mach/regs-spi.h #define SPI_SR_TFNF FIELD(1, 1, 1) FIELD 46 arch/unicore32/include/mach/regs-spi.h #define SPI_SR_TFE FIELD(1, 1, 2) FIELD 50 arch/unicore32/include/mach/regs-spi.h #define SPI_SR_RFNE FIELD(1, 1, 3) FIELD 54 arch/unicore32/include/mach/regs-spi.h #define SPI_SR_RFF FIELD(1, 1, 4) FIELD 59 arch/unicore32/include/mach/regs-spi.h #define SPI_ISR_TXEIS FIELD(1, 1, 0) FIELD 63 arch/unicore32/include/mach/regs-spi.h #define SPI_ISR_TXOIS FIELD(1, 1, 1) FIELD 67 arch/unicore32/include/mach/regs-spi.h #define SPI_ISR_RXUIS FIELD(1, 1, 2) FIELD 71 arch/unicore32/include/mach/regs-spi.h #define SPI_ISR_RXOIS FIELD(1, 1, 3) FIELD 75 arch/unicore32/include/mach/regs-spi.h #define SPI_ISR_RXFIS FIELD(1, 1, 4) FIELD 76 arch/unicore32/include/mach/regs-spi.h #define SPI_ISR_MSTIS FIELD(1, 1, 5) FIELD 81 arch/unicore32/include/mach/regs-spi.h #define SPI_IMR_TXEIM FIELD(1, 1, 0) FIELD 85 arch/unicore32/include/mach/regs-spi.h #define SPI_IMR_TXOIM FIELD(1, 1, 1) FIELD 89 arch/unicore32/include/mach/regs-spi.h #define SPI_IMR_RXUIM FIELD(1, 1, 2) FIELD 93 arch/unicore32/include/mach/regs-spi.h #define SPI_IMR_RXOIM FIELD(1, 1, 3) FIELD 97 arch/unicore32/include/mach/regs-spi.h #define SPI_IMR_RXFIM FIELD(1, 1, 4) FIELD 98 arch/unicore32/include/mach/regs-spi.h #define SPI_IMR_MSTIM FIELD(1, 1, 5) FIELD 136 arch/unicore32/include/mach/regs-umal.h #define UMAL_CFG1_TXENABLE FIELD(1, 1, 0) FIELD 137 arch/unicore32/include/mach/regs-umal.h #define UMAL_CFG1_RXENABLE FIELD(1, 1, 2) FIELD 138 arch/unicore32/include/mach/regs-umal.h #define UMAL_CFG1_TXFLOWCTL FIELD(1, 1, 4) FIELD 139 arch/unicore32/include/mach/regs-umal.h #define UMAL_CFG1_RXFLOWCTL FIELD(1, 1, 5) FIELD 140 arch/unicore32/include/mach/regs-umal.h #define UMAL_CFG1_CONFLPBK FIELD(1, 1, 8) FIELD 141 arch/unicore32/include/mach/regs-umal.h #define UMAL_CFG1_RESET FIELD(1, 1, 31) FIELD 147 arch/unicore32/include/mach/regs-umal.h #define UMAL_CFG2_FULLDUPLEX FIELD(1, 1, 0) FIELD 148 arch/unicore32/include/mach/regs-umal.h #define UMAL_CFG2_CRCENABLE FIELD(1, 1, 1) FIELD 149 arch/unicore32/include/mach/regs-umal.h #define UMAL_CFG2_PADCRC FIELD(1, 1, 2) FIELD 150 arch/unicore32/include/mach/regs-umal.h #define UMAL_CFG2_LENGTHCHECK FIELD(1, 1, 4) FIELD 152 arch/unicore32/include/mach/regs-umal.h #define UMAL_CFG2_NIBBLEMODE FIELD(1, 2, 8) FIELD 153 arch/unicore32/include/mach/regs-umal.h #define UMAL_CFG2_BYTEMODE FIELD(2, 2, 8) FIELD 155 arch/unicore32/include/mach/regs-umal.h #define UMAL_CFG2_DEFPREAMBLEN FIELD(7, 4, 12) FIELD 169 arch/unicore32/include/mach/regs-umal.h #define UMAL_IFCTRL_RESET FIELD(1, 1, 31) FIELD 174 arch/unicore32/include/mach/regs-umal.h #define UMAL_MIICFG_RESET FIELD(1, 1, 31) FIELD 179 arch/unicore32/include/mach/regs-umal.h #define UMAL_MIICMD_READ FIELD(1, 1, 0) FIELD 184 arch/unicore32/include/mach/regs-umal.h #define UMAL_MIIIDCT_BUSY FIELD(1, 1, 0) FIELD 185 arch/unicore32/include/mach/regs-umal.h #define UMAL_MIIIDCT_NOTVALID FIELD(1, 1, 2) FIELD 190 arch/unicore32/include/mach/regs-umal.h #define UMAL_DMA_Enable FIELD(1, 1, 0) FIELD 195 arch/unicore32/include/mach/regs-umal.h #define UMAL_DMAIntrMask_ENABLEHALFWORD FIELD(1, 1, 16) FIELD 200 arch/unicore32/include/mach/regs-umal.h #define CLR_RX_BUS_ERR FIELD(1, 1, 3) FIELD 201 arch/unicore32/include/mach/regs-umal.h #define CLR_RX_OVERFLOW FIELD(1, 1, 2) FIELD 202 arch/unicore32/include/mach/regs-umal.h #define CLR_RX_PKT FIELD(1, 1, 0) FIELD 207 arch/unicore32/include/mach/regs-umal.h #define CLR_TX_BUS_ERR FIELD(1, 1, 3) FIELD 208 arch/unicore32/include/mach/regs-umal.h #define CLR_TX_UNDERRUN FIELD(1, 1, 1) FIELD 209 arch/unicore32/include/mach/regs-umal.h #define CLR_TX_PKT FIELD(1, 1, 0) FIELD 214 arch/unicore32/include/mach/regs-umal.h #define INT_RX_MASK FIELD(0xd, 4, 4) FIELD 215 arch/unicore32/include/mach/regs-umal.h #define INT_TX_MASK FIELD(0xb, 4, 0) FIELD 217 arch/unicore32/include/mach/regs-umal.h #define INT_RX_BUS_ERR FIELD(1, 1, 7) FIELD 218 arch/unicore32/include/mach/regs-umal.h #define INT_RX_OVERFLOW FIELD(1, 1, 6) FIELD 219 arch/unicore32/include/mach/regs-umal.h #define INT_RX_PKT FIELD(1, 1, 4) FIELD 220 arch/unicore32/include/mach/regs-umal.h #define INT_TX_BUS_ERR FIELD(1, 1, 3) FIELD 221 arch/unicore32/include/mach/regs-umal.h #define INT_TX_UNDERRUN FIELD(1, 1, 1) FIELD 222 arch/unicore32/include/mach/regs-umal.h #define INT_TX_PKT FIELD(1, 1, 0) FIELD 227 arch/unicore32/include/mach/regs-umal.h #define UMAL_DESC_PACKETSIZE_EMPTY FIELD(1, 1, 31) FIELD 228 arch/unicore32/include/mach/regs-umal.h #define UMAL_DESC_PACKETSIZE_NONEMPTY FIELD(0, 1, 31) FIELD 181 arch/unicore32/include/mach/regs-unigfx.h #define UDE_CFG_DST8 FIELD(0x0, 2, 8) FIELD 182 arch/unicore32/include/mach/regs-unigfx.h #define UDE_CFG_DST16 FIELD(0x1, 2, 8) FIELD 183 arch/unicore32/include/mach/regs-unigfx.h #define UDE_CFG_DST24 FIELD(0x2, 2, 8) FIELD 184 arch/unicore32/include/mach/regs-unigfx.h #define UDE_CFG_DST32 FIELD(0x3, 2, 8) FIELD 189 arch/unicore32/include/mach/regs-unigfx.h #define UDE_CFG_GDEN_ENABLE FIELD(1, 1, 3) FIELD 193 arch/unicore32/include/mach/regs-unigfx.h #define UDE_CFG_VDEN_ENABLE FIELD(1, 1, 4) FIELD 197 arch/unicore32/include/mach/regs-unigfx.h #define UDE_CFG_CDEN_ENABLE FIELD(1, 1, 5) FIELD 201 arch/unicore32/include/mach/regs-unigfx.h #define UDE_CFG_TIMEUP_ENABLE FIELD(1, 1, 6) FIELD 303 arch/unicore32/kernel/irq.c writel(FMASK(8, 0) & ~FIELD(1, 1, GPI_SOFF_REQ), GPIO_GPIR); FIELD 51 arch/unicore32/kernel/pci.c | FIELD(value, 8, (where&3)*8), PCICFG_DATA); FIELD 55 arch/unicore32/kernel/pci.c | FIELD(value, 16, (where&2)*8), PCICFG_DATA); FIELD 9 arch/x86/kvm/vmx/vmcs12.c FIELD(number, name), \ FIELD 13 arch/x86/kvm/vmx/vmcs12.c FIELD(VIRTUAL_PROCESSOR_ID, virtual_processor_id), FIELD 14 arch/x86/kvm/vmx/vmcs12.c FIELD(POSTED_INTR_NV, posted_intr_nv), FIELD 15 arch/x86/kvm/vmx/vmcs12.c FIELD(GUEST_ES_SELECTOR, guest_es_selector), FIELD 16 arch/x86/kvm/vmx/vmcs12.c FIELD(GUEST_CS_SELECTOR, guest_cs_selector), FIELD 17 arch/x86/kvm/vmx/vmcs12.c FIELD(GUEST_SS_SELECTOR, guest_ss_selector), FIELD 18 arch/x86/kvm/vmx/vmcs12.c FIELD(GUEST_DS_SELECTOR, guest_ds_selector), FIELD 19 arch/x86/kvm/vmx/vmcs12.c FIELD(GUEST_FS_SELECTOR, guest_fs_selector), FIELD 20 arch/x86/kvm/vmx/vmcs12.c FIELD(GUEST_GS_SELECTOR, guest_gs_selector), FIELD 21 arch/x86/kvm/vmx/vmcs12.c FIELD(GUEST_LDTR_SELECTOR, guest_ldtr_selector), FIELD 22 arch/x86/kvm/vmx/vmcs12.c FIELD(GUEST_TR_SELECTOR, guest_tr_selector), FIELD 23 arch/x86/kvm/vmx/vmcs12.c FIELD(GUEST_INTR_STATUS, guest_intr_status), FIELD 24 arch/x86/kvm/vmx/vmcs12.c FIELD(GUEST_PML_INDEX, guest_pml_index), FIELD 25 arch/x86/kvm/vmx/vmcs12.c FIELD(HOST_ES_SELECTOR, host_es_selector), FIELD 26 arch/x86/kvm/vmx/vmcs12.c FIELD(HOST_CS_SELECTOR, host_cs_selector), FIELD 27 arch/x86/kvm/vmx/vmcs12.c FIELD(HOST_SS_SELECTOR, host_ss_selector), FIELD 28 arch/x86/kvm/vmx/vmcs12.c FIELD(HOST_DS_SELECTOR, host_ds_selector), FIELD 29 arch/x86/kvm/vmx/vmcs12.c FIELD(HOST_FS_SELECTOR, host_fs_selector), FIELD 30 arch/x86/kvm/vmx/vmcs12.c FIELD(HOST_GS_SELECTOR, host_gs_selector), FIELD 31 arch/x86/kvm/vmx/vmcs12.c FIELD(HOST_TR_SELECTOR, host_tr_selector), FIELD 67 arch/x86/kvm/vmx/vmcs12.c FIELD(PIN_BASED_VM_EXEC_CONTROL, pin_based_vm_exec_control), FIELD 68 arch/x86/kvm/vmx/vmcs12.c FIELD(CPU_BASED_VM_EXEC_CONTROL, cpu_based_vm_exec_control), FIELD 69 arch/x86/kvm/vmx/vmcs12.c FIELD(EXCEPTION_BITMAP, exception_bitmap), FIELD 70 arch/x86/kvm/vmx/vmcs12.c FIELD(PAGE_FAULT_ERROR_CODE_MASK, page_fault_error_code_mask), FIELD 71 arch/x86/kvm/vmx/vmcs12.c FIELD(PAGE_FAULT_ERROR_CODE_MATCH, page_fault_error_code_match), FIELD 72 arch/x86/kvm/vmx/vmcs12.c FIELD(CR3_TARGET_COUNT, cr3_target_count), FIELD 73 arch/x86/kvm/vmx/vmcs12.c FIELD(VM_EXIT_CONTROLS, vm_exit_controls), FIELD 74 arch/x86/kvm/vmx/vmcs12.c FIELD(VM_EXIT_MSR_STORE_COUNT, vm_exit_msr_store_count), FIELD 75 arch/x86/kvm/vmx/vmcs12.c FIELD(VM_EXIT_MSR_LOAD_COUNT, vm_exit_msr_load_count), FIELD 76 arch/x86/kvm/vmx/vmcs12.c FIELD(VM_ENTRY_CONTROLS, vm_entry_controls), FIELD 77 arch/x86/kvm/vmx/vmcs12.c FIELD(VM_ENTRY_MSR_LOAD_COUNT, vm_entry_msr_load_count), FIELD 78 arch/x86/kvm/vmx/vmcs12.c FIELD(VM_ENTRY_INTR_INFO_FIELD, vm_entry_intr_info_field), FIELD 79 arch/x86/kvm/vmx/vmcs12.c FIELD(VM_ENTRY_EXCEPTION_ERROR_CODE, vm_entry_exception_error_code), FIELD 80 arch/x86/kvm/vmx/vmcs12.c FIELD(VM_ENTRY_INSTRUCTION_LEN, vm_entry_instruction_len), FIELD 81 arch/x86/kvm/vmx/vmcs12.c FIELD(TPR_THRESHOLD, tpr_threshold), FIELD 82 arch/x86/kvm/vmx/vmcs12.c FIELD(SECONDARY_VM_EXEC_CONTROL, secondary_vm_exec_control), FIELD 83 arch/x86/kvm/vmx/vmcs12.c FIELD(VM_INSTRUCTION_ERROR, vm_instruction_error), FIELD 84 arch/x86/kvm/vmx/vmcs12.c FIELD(VM_EXIT_REASON, vm_exit_reason), FIELD 85 arch/x86/kvm/vmx/vmcs12.c FIELD(VM_EXIT_INTR_INFO, vm_exit_intr_info), FIELD 86 arch/x86/kvm/vmx/vmcs12.c FIELD(VM_EXIT_INTR_ERROR_CODE, vm_exit_intr_error_code), FIELD 87 arch/x86/kvm/vmx/vmcs12.c FIELD(IDT_VECTORING_INFO_FIELD, idt_vectoring_info_field), FIELD 88 arch/x86/kvm/vmx/vmcs12.c FIELD(IDT_VECTORING_ERROR_CODE, idt_vectoring_error_code), FIELD 89 arch/x86/kvm/vmx/vmcs12.c FIELD(VM_EXIT_INSTRUCTION_LEN, vm_exit_instruction_len), FIELD 90 arch/x86/kvm/vmx/vmcs12.c FIELD(VMX_INSTRUCTION_INFO, vmx_instruction_info), FIELD 91 arch/x86/kvm/vmx/vmcs12.c FIELD(GUEST_ES_LIMIT, guest_es_limit), FIELD 92 arch/x86/kvm/vmx/vmcs12.c FIELD(GUEST_CS_LIMIT, guest_cs_limit), FIELD 93 arch/x86/kvm/vmx/vmcs12.c FIELD(GUEST_SS_LIMIT, guest_ss_limit), FIELD 94 arch/x86/kvm/vmx/vmcs12.c FIELD(GUEST_DS_LIMIT, guest_ds_limit), FIELD 95 arch/x86/kvm/vmx/vmcs12.c FIELD(GUEST_FS_LIMIT, guest_fs_limit), FIELD 96 arch/x86/kvm/vmx/vmcs12.c FIELD(GUEST_GS_LIMIT, guest_gs_limit), FIELD 97 arch/x86/kvm/vmx/vmcs12.c FIELD(GUEST_LDTR_LIMIT, guest_ldtr_limit), FIELD 98 arch/x86/kvm/vmx/vmcs12.c FIELD(GUEST_TR_LIMIT, guest_tr_limit), FIELD 99 arch/x86/kvm/vmx/vmcs12.c FIELD(GUEST_GDTR_LIMIT, guest_gdtr_limit), FIELD 100 arch/x86/kvm/vmx/vmcs12.c FIELD(GUEST_IDTR_LIMIT, guest_idtr_limit), FIELD 101 arch/x86/kvm/vmx/vmcs12.c FIELD(GUEST_ES_AR_BYTES, guest_es_ar_bytes), FIELD 102 arch/x86/kvm/vmx/vmcs12.c FIELD(GUEST_CS_AR_BYTES, guest_cs_ar_bytes), FIELD 103 arch/x86/kvm/vmx/vmcs12.c FIELD(GUEST_SS_AR_BYTES, guest_ss_ar_bytes), FIELD 104 arch/x86/kvm/vmx/vmcs12.c FIELD(GUEST_DS_AR_BYTES, guest_ds_ar_bytes), FIELD 105 arch/x86/kvm/vmx/vmcs12.c FIELD(GUEST_FS_AR_BYTES, guest_fs_ar_bytes), FIELD 106 arch/x86/kvm/vmx/vmcs12.c FIELD(GUEST_GS_AR_BYTES, guest_gs_ar_bytes), FIELD 107 arch/x86/kvm/vmx/vmcs12.c FIELD(GUEST_LDTR_AR_BYTES, guest_ldtr_ar_bytes), FIELD 108 arch/x86/kvm/vmx/vmcs12.c FIELD(GUEST_TR_AR_BYTES, guest_tr_ar_bytes), FIELD 109 arch/x86/kvm/vmx/vmcs12.c FIELD(GUEST_INTERRUPTIBILITY_INFO, guest_interruptibility_info), FIELD 110 arch/x86/kvm/vmx/vmcs12.c FIELD(GUEST_ACTIVITY_STATE, guest_activity_state), FIELD 111 arch/x86/kvm/vmx/vmcs12.c FIELD(GUEST_SYSENTER_CS, guest_sysenter_cs), FIELD 112 arch/x86/kvm/vmx/vmcs12.c FIELD(HOST_IA32_SYSENTER_CS, host_ia32_sysenter_cs), FIELD 113 arch/x86/kvm/vmx/vmcs12.c FIELD(VMX_PREEMPTION_TIMER_VALUE, vmx_preemption_timer_value), FIELD 114 arch/x86/kvm/vmx/vmcs12.c FIELD(CR0_GUEST_HOST_MASK, cr0_guest_host_mask), FIELD 115 arch/x86/kvm/vmx/vmcs12.c FIELD(CR4_GUEST_HOST_MASK, cr4_guest_host_mask), FIELD 116 arch/x86/kvm/vmx/vmcs12.c FIELD(CR0_READ_SHADOW, cr0_read_shadow), FIELD 117 arch/x86/kvm/vmx/vmcs12.c FIELD(CR4_READ_SHADOW, cr4_read_shadow), FIELD 118 arch/x86/kvm/vmx/vmcs12.c FIELD(CR3_TARGET_VALUE0, cr3_target_value0), FIELD 119 arch/x86/kvm/vmx/vmcs12.c FIELD(CR3_TARGET_VALUE1, cr3_target_value1), FIELD 120 arch/x86/kvm/vmx/vmcs12.c FIELD(CR3_TARGET_VALUE2, cr3_target_value2), FIELD 121 arch/x86/kvm/vmx/vmcs12.c FIELD(CR3_TARGET_VALUE3, cr3_target_value3), FIELD 122 arch/x86/kvm/vmx/vmcs12.c FIELD(EXIT_QUALIFICATION, exit_qualification), FIELD 123 arch/x86/kvm/vmx/vmcs12.c FIELD(GUEST_LINEAR_ADDRESS, guest_linear_address), FIELD 124 arch/x86/kvm/vmx/vmcs12.c FIELD(GUEST_CR0, guest_cr0), FIELD 125 arch/x86/kvm/vmx/vmcs12.c FIELD(GUEST_CR3, guest_cr3), FIELD 126 arch/x86/kvm/vmx/vmcs12.c FIELD(GUEST_CR4, guest_cr4), FIELD 127 arch/x86/kvm/vmx/vmcs12.c FIELD(GUEST_ES_BASE, guest_es_base), FIELD 128 arch/x86/kvm/vmx/vmcs12.c FIELD(GUEST_CS_BASE, guest_cs_base), FIELD 129 arch/x86/kvm/vmx/vmcs12.c FIELD(GUEST_SS_BASE, guest_ss_base), FIELD 130 arch/x86/kvm/vmx/vmcs12.c FIELD(GUEST_DS_BASE, guest_ds_base), FIELD 131 arch/x86/kvm/vmx/vmcs12.c FIELD(GUEST_FS_BASE, guest_fs_base), FIELD 132 arch/x86/kvm/vmx/vmcs12.c FIELD(GUEST_GS_BASE, guest_gs_base), FIELD 133 arch/x86/kvm/vmx/vmcs12.c FIELD(GUEST_LDTR_BASE, guest_ldtr_base), FIELD 134 arch/x86/kvm/vmx/vmcs12.c FIELD(GUEST_TR_BASE, guest_tr_base), FIELD 135 arch/x86/kvm/vmx/vmcs12.c FIELD(GUEST_GDTR_BASE, guest_gdtr_base), FIELD 136 arch/x86/kvm/vmx/vmcs12.c FIELD(GUEST_IDTR_BASE, guest_idtr_base), FIELD 137 arch/x86/kvm/vmx/vmcs12.c FIELD(GUEST_DR7, guest_dr7), FIELD 138 arch/x86/kvm/vmx/vmcs12.c FIELD(GUEST_RSP, guest_rsp), FIELD 139 arch/x86/kvm/vmx/vmcs12.c FIELD(GUEST_RIP, guest_rip), FIELD 140 arch/x86/kvm/vmx/vmcs12.c FIELD(GUEST_RFLAGS, guest_rflags), FIELD 141 arch/x86/kvm/vmx/vmcs12.c FIELD(GUEST_PENDING_DBG_EXCEPTIONS, guest_pending_dbg_exceptions), FIELD 142 arch/x86/kvm/vmx/vmcs12.c FIELD(GUEST_SYSENTER_ESP, guest_sysenter_esp), FIELD 143 arch/x86/kvm/vmx/vmcs12.c FIELD(GUEST_SYSENTER_EIP, guest_sysenter_eip), FIELD 144 arch/x86/kvm/vmx/vmcs12.c FIELD(HOST_CR0, host_cr0), FIELD 145 arch/x86/kvm/vmx/vmcs12.c FIELD(HOST_CR3, host_cr3), FIELD 146 arch/x86/kvm/vmx/vmcs12.c FIELD(HOST_CR4, host_cr4), FIELD 147 arch/x86/kvm/vmx/vmcs12.c FIELD(HOST_FS_BASE, host_fs_base), FIELD 148 arch/x86/kvm/vmx/vmcs12.c FIELD(HOST_GS_BASE, host_gs_base), FIELD 149 arch/x86/kvm/vmx/vmcs12.c FIELD(HOST_TR_BASE, host_tr_base), FIELD 150 arch/x86/kvm/vmx/vmcs12.c FIELD(HOST_GDTR_BASE, host_gdtr_base), FIELD 151 arch/x86/kvm/vmx/vmcs12.c FIELD(HOST_IDTR_BASE, host_idtr_base), FIELD 152 arch/x86/kvm/vmx/vmcs12.c FIELD(HOST_IA32_SYSENTER_ESP, host_ia32_sysenter_esp), FIELD 153 arch/x86/kvm/vmx/vmcs12.c FIELD(HOST_IA32_SYSENTER_EIP, host_ia32_sysenter_eip), FIELD 154 arch/x86/kvm/vmx/vmcs12.c FIELD(HOST_RSP, host_rsp), FIELD 155 arch/x86/kvm/vmx/vmcs12.c FIELD(HOST_RIP, host_rip), FIELD 1069 drivers/gpu/drm/amd/amdgpu/amdgpu.h #define REG_SET(FIELD, v) (((v) << FIELD##_SHIFT) & FIELD##_MASK) FIELD 1070 drivers/gpu/drm/amd/amdgpu/amdgpu.h #define REG_GET(FIELD, v) (((v) << FIELD##_SHIFT) & FIELD##_MASK) FIELD 32 drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c major = FIELD(version, MDP4_VERSION_MAJOR); FIELD 33 drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c minor = FIELD(version, MDP4_VERSION_MINOR); FIELD 563 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c *major = FIELD(version, MDP5_HW_VERSION_MAJOR); FIELD 564 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c *minor = FIELD(version, MDP5_HW_VERSION_MINOR); FIELD 789 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c FIELD(lr, MDP5_PIPE_SW_PIX_EXT_LR_LEFT_RPT), FIELD 790 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c FIELD(lr, MDP5_PIPE_SW_PIX_EXT_LR_RIGHT_RPT), FIELD 791 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c FIELD(lr, MDP5_PIPE_SW_PIX_EXT_LR_LEFT_OVF), FIELD 792 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c FIELD(lr, MDP5_PIPE_SW_PIX_EXT_LR_RIGHT_OVF), FIELD 793 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c FIELD(req, MDP5_PIPE_SW_PIX_EXT_REQ_PIXELS_LEFT_RIGHT)); FIELD 796 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c FIELD(tb, MDP5_PIPE_SW_PIX_EXT_TB_TOP_RPT), FIELD 797 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c FIELD(tb, MDP5_PIPE_SW_PIX_EXT_TB_BOTTOM_RPT), FIELD 798 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c FIELD(tb, MDP5_PIPE_SW_PIX_EXT_TB_TOP_OVF), FIELD 799 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c FIELD(tb, MDP5_PIPE_SW_PIX_EXT_TB_BOTTOM_OVF), FIELD 800 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c FIELD(req, MDP5_PIPE_SW_PIX_EXT_REQ_PIXELS_TOP_BOTTOM)); FIELD 52 drivers/gpu/drm/msm/dsi/dsi_host.c ver = FIELD(ver, DSI_VERSION_MAJOR); FIELD 68 drivers/gpu/drm/msm/dsi/dsi_host.c ver = FIELD(ver, DSI_VERSION_MAJOR); FIELD 274 drivers/gpu/drm/msm/dsi/pll/dsi_pll_28nm.c sdm_byp_div = FIELD( FIELD 280 drivers/gpu/drm/msm/dsi/pll/dsi_pll_28nm.c sdm_dc_off = FIELD( FIELD 284 drivers/gpu/drm/msm/dsi/pll/dsi_pll_28nm.c sdm2 = FIELD(pll_read(base + REG_DSI_28nm_PHY_PLL_SDM_CFG2), FIELD 286 drivers/gpu/drm/msm/dsi/pll/dsi_pll_28nm.c sdm3 = FIELD(pll_read(base + REG_DSI_28nm_PHY_PLL_SDM_CFG3), FIELD 201 drivers/gpu/drm/msm/hdmi/hdmi_i2c.c p->buf[j] = FIELD(ddc_data, HDMI_DDC_DATA_DATA); FIELD 2518 drivers/gpu/drm/radeon/radeon.h #define REG_SET(FIELD, v) (((v) << FIELD##_SHIFT) & FIELD##_MASK) FIELD 2519 drivers/gpu/drm/radeon/radeon.h #define REG_GET(FIELD, v) (((v) << FIELD##_SHIFT) & FIELD##_MASK) FIELD 1120 drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c #define MLXSW_SP_PTP_PORT_STAT(NAME, FIELD) \ FIELD 1124 drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c FIELD), \ FIELD 477 drivers/scsi/aic7xxx/aicasm/aicasm_gram.y process_field(FIELD, $2, $3.value); FIELD 485 drivers/scsi/aic7xxx/aicasm/aicasm_gram.y process_field(FIELD, $2, $3.value); FIELD 708 drivers/scsi/aic7xxx/aicasm/aicasm_gram.y case FIELD: FIELD 1511 drivers/scsi/aic7xxx/aicasm/aicasm_gram.y case FIELD: FIELD 1896 drivers/scsi/aic7xxx/aicasm/aicasm_gram.y || node->symbol->type == FIELD FIELD 102 drivers/scsi/aic7xxx/aicasm/aicasm_symbol.c case FIELD: FIELD 242 drivers/scsi/aic7xxx/aicasm/aicasm_symbol.c case FIELD: FIELD 502 drivers/scsi/aic7xxx/aicasm/aicasm_symbol.c case FIELD: FIELD 629 drivers/scsi/aic7xxx/aicasm/aicasm_symbol.c case FIELD: FIELD 169 drivers/visorbus/visorchannel.c #define SIG_WRITE_FIELD(channel, queue, sig_hdr, FIELD) \ FIELD 172 drivers/visorbus/visorchannel.c offsetof(struct signal_queue_header, FIELD), \ FIELD 173 drivers/visorbus/visorchannel.c &((sig_hdr)->FIELD), \ FIELD 174 drivers/visorbus/visorchannel.c sizeof((sig_hdr)->FIELD)) FIELD 537 kernel/bpf/verifier.c #define COPY_STATE_FN(NAME, COUNT, FIELD, SIZE) \ FIELD 541 kernel/bpf/verifier.c if (!src->FIELD) \ FIELD 548 kernel/bpf/verifier.c memcpy(dst->FIELD, src->FIELD, \ FIELD 549 kernel/bpf/verifier.c sizeof(*src->FIELD) * (src->COUNT / SIZE)); \ FIELD 558 kernel/bpf/verifier.c #define REALLOC_STATE_FN(NAME, COUNT, FIELD, SIZE) \ FIELD 563 kernel/bpf/verifier.c struct bpf_##NAME##_state *new_##FIELD; \ FIELD 571 kernel/bpf/verifier.c kfree(state->FIELD); \ FIELD 572 kernel/bpf/verifier.c state->FIELD = NULL; \ FIELD 576 kernel/bpf/verifier.c new_##FIELD = kmalloc_array(slot, sizeof(struct bpf_##NAME##_state), \ FIELD 578 kernel/bpf/verifier.c if (!new_##FIELD) \ FIELD 581 kernel/bpf/verifier.c if (state->FIELD) \ FIELD 582 kernel/bpf/verifier.c memcpy(new_##FIELD, state->FIELD, \ FIELD 583 kernel/bpf/verifier.c sizeof(*new_##FIELD) * (old_size / SIZE)); \ FIELD 584 kernel/bpf/verifier.c memset(new_##FIELD + old_size / SIZE, 0, \ FIELD 585 kernel/bpf/verifier.c sizeof(*new_##FIELD) * (size - old_size) / SIZE); \ FIELD 588 kernel/bpf/verifier.c kfree(state->FIELD); \ FIELD 589 kernel/bpf/verifier.c state->FIELD = new_##FIELD; \ FIELD 5578 net/core/filter.c #define BPF_TCP_SOCK_GET_COMMON(FIELD) \ FIELD 5580 net/core/filter.c BUILD_BUG_ON(FIELD_SIZEOF(struct tcp_sock, FIELD) > \ FIELD 5581 net/core/filter.c FIELD_SIZEOF(struct bpf_tcp_sock, FIELD)); \ FIELD 5582 net/core/filter.c *insn++ = BPF_LDX_MEM(BPF_FIELD_SIZEOF(struct tcp_sock, FIELD),\ FIELD 5584 net/core/filter.c offsetof(struct tcp_sock, FIELD)); \ FIELD 5587 net/core/filter.c #define BPF_INET_SOCK_GET_COMMON(FIELD) \ FIELD 5590 net/core/filter.c FIELD) > \ FIELD 5591 net/core/filter.c FIELD_SIZEOF(struct bpf_tcp_sock, FIELD)); \ FIELD 5594 net/core/filter.c FIELD), \ FIELD 5598 net/core/filter.c FIELD)); \ FIELD 5769 net/core/filter.c #define BPF_XDP_SOCK_GET(FIELD) \ FIELD 5771 net/core/filter.c BUILD_BUG_ON(FIELD_SIZEOF(struct xdp_sock, FIELD) > \ FIELD 5772 net/core/filter.c FIELD_SIZEOF(struct bpf_xdp_sock, FIELD)); \ FIELD 5773 net/core/filter.c *insn++ = BPF_LDX_MEM(BPF_FIELD_SIZEOF(struct xdp_sock, FIELD),\ FIELD 5775 net/core/filter.c offsetof(struct xdp_sock, FIELD)); \ FIELD 8007 net/core/filter.c #define SOCK_OPS_GET_TCP_SOCK_FIELD(FIELD) \ FIELD 8008 net/core/filter.c SOCK_OPS_GET_FIELD(FIELD, FIELD, struct tcp_sock) FIELD 1198 net/core/net-sysfs.c #define BQL_ATTR(NAME, FIELD) \ FIELD 1202 net/core/net-sysfs.c return bql_show(buf, queue->dql.FIELD); \ FIELD 1208 net/core/net-sysfs.c return bql_set(buf, len, &queue->dql.FIELD); \ FIELD 33 tools/lib/bpf/libbpf_internal.h # define offsetofend(TYPE, FIELD) \ FIELD 34 tools/lib/bpf/libbpf_internal.h (offsetof(TYPE, FIELD) + sizeof(((TYPE *)0)->FIELD)) FIELD 13 tools/testing/selftests/bpf/progs/test_pkt_md_access.c #define TEST_FIELD(TYPE, FIELD, MASK) \ FIELD 15 tools/testing/selftests/bpf/progs/test_pkt_md_access.c TYPE tmp = *(volatile TYPE *)&skb->FIELD; \ FIELD 16 tools/testing/selftests/bpf/progs/test_pkt_md_access.c if (tmp != ((*(volatile __u32 *)&skb->FIELD) & MASK)) \ FIELD 21 tools/testing/selftests/bpf/progs/test_pkt_md_access.c #define TEST_FIELD(TYPE, FIELD, MASK) \ FIELD 23 tools/testing/selftests/bpf/progs/test_pkt_md_access.c TYPE tmp = *((volatile TYPE *)&skb->FIELD + \ FIELD 24 tools/testing/selftests/bpf/progs/test_pkt_md_access.c TEST_FIELD_OFFSET(skb->FIELD, TYPE)); \ FIELD 25 tools/testing/selftests/bpf/progs/test_pkt_md_access.c if (tmp != ((*(volatile __u32 *)&skb->FIELD) & MASK)) \