FEATURE_PCC_LIMIT_CONTROL_BIT  426 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c 	data->smu_features[GNLD_PCC_LIMIT].smu_feature_id = FEATURE_PCC_LIMIT_CONTROL_BIT;
FEATURE_PCC_LIMIT_CONTROL_BIT   97 drivers/gpu/drm/amd/powerplay/inc/smu9.h #define FEATURE_PCC_LIMIT_CONTROL_MASK   (1 << FEATURE_PCC_LIMIT_CONTROL_BIT  )