FDI_RX_IMR       4492 drivers/gpu/drm/i915/display/intel_display.c 	reg = FDI_RX_IMR(pipe);
FDI_RX_IMR       4590 drivers/gpu/drm/i915/display/intel_display.c 	reg = FDI_RX_IMR(pipe);
FDI_RX_IMR       4723 drivers/gpu/drm/i915/display/intel_display.c 	reg = FDI_RX_IMR(pipe);
FDI_RX_IMR        586 drivers/gpu/drm/i915/gvt/handlers.c 	fdi_rx_imr = FDI_RX_IMR(pipe);
FDI_RX_IMR        641 drivers/gpu/drm/i915/gvt/handlers.c 	calc_index(offset, _FDI_RXA_IMR, _FDI_RXB_IMR, 0, FDI_RX_IMR(PIPE_C))
FDI_RX_IMR       2217 drivers/gpu/drm/i915/gvt/handlers.c 	MMIO_DH(FDI_RX_IMR(PIPE_A), D_ALL, NULL, update_fdi_rx_iir_status);
FDI_RX_IMR       2218 drivers/gpu/drm/i915/gvt/handlers.c 	MMIO_DH(FDI_RX_IMR(PIPE_B), D_ALL, NULL, update_fdi_rx_iir_status);
FDI_RX_IMR       2219 drivers/gpu/drm/i915/gvt/handlers.c 	MMIO_DH(FDI_RX_IMR(PIPE_C), D_ALL, NULL, update_fdi_rx_iir_status);