FDI_RX_CTL       1069 drivers/gpu/drm/i915/display/intel_crt.c 		dev_priv->fdi_rx_config = I915_READ(FDI_RX_CTL(PIPE_A)) & fdi_config;
FDI_RX_CTL       1093 drivers/gpu/drm/i915/display/intel_ddi.c 	I915_WRITE(FDI_RX_CTL(PIPE_A), rx_ctl_val);
FDI_RX_CTL       1094 drivers/gpu/drm/i915/display/intel_ddi.c 	POSTING_READ(FDI_RX_CTL(PIPE_A));
FDI_RX_CTL       1099 drivers/gpu/drm/i915/display/intel_ddi.c 	I915_WRITE(FDI_RX_CTL(PIPE_A), rx_ctl_val);
FDI_RX_CTL       1133 drivers/gpu/drm/i915/display/intel_ddi.c 		I915_WRITE(FDI_RX_CTL(PIPE_A), rx_ctl_val);
FDI_RX_CTL       1134 drivers/gpu/drm/i915/display/intel_ddi.c 		POSTING_READ(FDI_RX_CTL(PIPE_A));
FDI_RX_CTL       1164 drivers/gpu/drm/i915/display/intel_ddi.c 		I915_WRITE(FDI_RX_CTL(PIPE_A), rx_ctl_val);
FDI_RX_CTL       1165 drivers/gpu/drm/i915/display/intel_ddi.c 		POSTING_READ(FDI_RX_CTL(PIPE_A));
FDI_RX_CTL       3448 drivers/gpu/drm/i915/display/intel_ddi.c 	val = I915_READ(FDI_RX_CTL(PIPE_A));
FDI_RX_CTL       3450 drivers/gpu/drm/i915/display/intel_ddi.c 	I915_WRITE(FDI_RX_CTL(PIPE_A), val);
FDI_RX_CTL       3460 drivers/gpu/drm/i915/display/intel_ddi.c 	val = I915_READ(FDI_RX_CTL(PIPE_A));
FDI_RX_CTL       3462 drivers/gpu/drm/i915/display/intel_ddi.c 	I915_WRITE(FDI_RX_CTL(PIPE_A), val);
FDI_RX_CTL       3464 drivers/gpu/drm/i915/display/intel_ddi.c 	val = I915_READ(FDI_RX_CTL(PIPE_A));
FDI_RX_CTL       3466 drivers/gpu/drm/i915/display/intel_ddi.c 	I915_WRITE(FDI_RX_CTL(PIPE_A), val);
FDI_RX_CTL       1146 drivers/gpu/drm/i915/display/intel_display.c 	val = I915_READ(FDI_RX_CTL(pipe));
FDI_RX_CTL       1178 drivers/gpu/drm/i915/display/intel_display.c 	val = I915_READ(FDI_RX_CTL(pipe));
FDI_RX_CTL       4456 drivers/gpu/drm/i915/display/intel_display.c 	reg = FDI_RX_CTL(pipe);
FDI_RX_CTL       4509 drivers/gpu/drm/i915/display/intel_display.c 	reg = FDI_RX_CTL(pipe);
FDI_RX_CTL       4544 drivers/gpu/drm/i915/display/intel_display.c 	reg = FDI_RX_CTL(pipe);
FDI_RX_CTL       4614 drivers/gpu/drm/i915/display/intel_display.c 	reg = FDI_RX_CTL(pipe);
FDI_RX_CTL       4667 drivers/gpu/drm/i915/display/intel_display.c 	reg = FDI_RX_CTL(pipe);
FDI_RX_CTL       4744 drivers/gpu/drm/i915/display/intel_display.c 		reg = FDI_RX_CTL(pipe);
FDI_RX_CTL       4765 drivers/gpu/drm/i915/display/intel_display.c 		reg = FDI_RX_CTL(pipe);
FDI_RX_CTL       4800 drivers/gpu/drm/i915/display/intel_display.c 		reg = FDI_RX_CTL(pipe);
FDI_RX_CTL       4840 drivers/gpu/drm/i915/display/intel_display.c 	reg = FDI_RX_CTL(pipe);
FDI_RX_CTL       4877 drivers/gpu/drm/i915/display/intel_display.c 	reg = FDI_RX_CTL(pipe);
FDI_RX_CTL       4889 drivers/gpu/drm/i915/display/intel_display.c 	reg = FDI_RX_CTL(pipe);
FDI_RX_CTL       4913 drivers/gpu/drm/i915/display/intel_display.c 	reg = FDI_RX_CTL(pipe);
FDI_RX_CTL       4933 drivers/gpu/drm/i915/display/intel_display.c 	reg = FDI_RX_CTL(pipe);
FDI_RX_CTL       5139 drivers/gpu/drm/i915/display/intel_display.c 	WARN_ON(I915_READ(FDI_RX_CTL(PIPE_B)) & FDI_RX_ENABLE);
FDI_RX_CTL       5140 drivers/gpu/drm/i915/display/intel_display.c 	WARN_ON(I915_READ(FDI_RX_CTL(PIPE_C)) & FDI_RX_ENABLE);
FDI_RX_CTL       10000 drivers/gpu/drm/i915/display/intel_display.c 		tmp = I915_READ(FDI_RX_CTL(crtc->pipe));
FDI_RX_CTL       10392 drivers/gpu/drm/i915/display/intel_display.c 		tmp = I915_READ(FDI_RX_CTL(PIPE_A));
FDI_RX_CTL        588 drivers/gpu/drm/i915/gvt/handlers.c 	fdi_rx_ctl = FDI_RX_CTL(pipe);
FDI_RX_CTL        635 drivers/gpu/drm/i915/gvt/handlers.c 	calc_index(offset, _FDI_RXA_CTL, _FDI_RXB_CTL, 0, FDI_RX_CTL(PIPE_C))
FDI_RX_CTL       2220 drivers/gpu/drm/i915/gvt/handlers.c 	MMIO_DH(FDI_RX_CTL(PIPE_A), D_ALL, NULL, update_fdi_rx_iir_status);
FDI_RX_CTL       2221 drivers/gpu/drm/i915/gvt/handlers.c 	MMIO_DH(FDI_RX_CTL(PIPE_B), D_ALL, NULL, update_fdi_rx_iir_status);
FDI_RX_CTL       2222 drivers/gpu/drm/i915/gvt/handlers.c 	MMIO_DH(FDI_RX_CTL(PIPE_C), D_ALL, NULL, update_fdi_rx_iir_status);