AHCI_PHYCS0R 96 drivers/ata/ahci_sunxi.c sunxi_clrsetbits(reg_base + AHCI_PHYCS0R, AHCI_PHYCS0R 104 drivers/ata/ahci_sunxi.c sunxi_clrsetbits(reg_base + AHCI_PHYCS0R, AHCI_PHYCS0R 110 drivers/ata/ahci_sunxi.c sunxi_setbits(reg_base + AHCI_PHYCS0R, (0x1 << 19)); AHCI_PHYCS0R 114 drivers/ata/ahci_sunxi.c reg_val = sunxi_getbits(reg_base + AHCI_PHYCS0R, 0x7, 28);