EXTRA_REG_NHMEX_M_ZDP_CTL_FVC 560 arch/x86/events/intel/uncore_nhmex.c if (idx < EXTRA_REG_NHMEX_M_ZDP_CTL_FVC) { EXTRA_REG_NHMEX_M_ZDP_CTL_FVC 577 arch/x86/events/intel/uncore_nhmex.c idx -= EXTRA_REG_NHMEX_M_ZDP_CTL_FVC; EXTRA_REG_NHMEX_M_ZDP_CTL_FVC 586 arch/x86/events/intel/uncore_nhmex.c er = &box->shared_regs[EXTRA_REG_NHMEX_M_ZDP_CTL_FVC]; EXTRA_REG_NHMEX_M_ZDP_CTL_FVC 618 arch/x86/events/intel/uncore_nhmex.c if (idx < EXTRA_REG_NHMEX_M_ZDP_CTL_FVC) { EXTRA_REG_NHMEX_M_ZDP_CTL_FVC 624 arch/x86/events/intel/uncore_nhmex.c idx -= EXTRA_REG_NHMEX_M_ZDP_CTL_FVC; EXTRA_REG_NHMEX_M_ZDP_CTL_FVC 625 arch/x86/events/intel/uncore_nhmex.c er = &box->shared_regs[EXTRA_REG_NHMEX_M_ZDP_CTL_FVC]; EXTRA_REG_NHMEX_M_ZDP_CTL_FVC 637 arch/x86/events/intel/uncore_nhmex.c idx = orig_idx - EXTRA_REG_NHMEX_M_ZDP_CTL_FVC; EXTRA_REG_NHMEX_M_ZDP_CTL_FVC 714 arch/x86/events/intel/uncore_nhmex.c idx[0] >= EXTRA_REG_NHMEX_M_ZDP_CTL_FVC) { EXTRA_REG_NHMEX_M_ZDP_CTL_FVC 722 arch/x86/events/intel/uncore_nhmex.c idx[0] -= EXTRA_REG_NHMEX_M_ZDP_CTL_FVC; EXTRA_REG_NHMEX_M_ZDP_CTL_FVC 724 arch/x86/events/intel/uncore_nhmex.c idx[0] += EXTRA_REG_NHMEX_M_ZDP_CTL_FVC; EXTRA_REG_NHMEX_M_ZDP_CTL_FVC 760 arch/x86/events/intel/uncore_nhmex.c if (er->idx < EXTRA_REG_NHMEX_M_ZDP_CTL_FVC) EXTRA_REG_NHMEX_M_ZDP_CTL_FVC 825 arch/x86/events/intel/uncore_nhmex.c if (idx < EXTRA_REG_NHMEX_M_ZDP_CTL_FVC) EXTRA_REG_NHMEX_M_ZDP_CTL_FVC 828 arch/x86/events/intel/uncore_nhmex.c er = &box->shared_regs[EXTRA_REG_NHMEX_M_ZDP_CTL_FVC];