ESR_ELx_SYS64_ISS_OP0_MASK 170 arch/arm64/include/asm/esr.h #define ESR_ELx_SYS64_ISS_SYS_MASK (ESR_ELx_SYS64_ISS_OP0_MASK | \ ESR_ELx_SYS64_ISS_OP0_MASK 198 arch/arm64/include/asm/esr.h #define ESR_ELx_SYS64_ISS_EL0_CACHE_OP_MASK (ESR_ELx_SYS64_ISS_OP0_MASK | \ ESR_ELx_SYS64_ISS_OP0_MASK 211 arch/arm64/include/asm/esr.h #define ESR_ELx_SYS64_ISS_SYS_MRS_OP_MASK (ESR_ELx_SYS64_ISS_OP0_MASK | \ ESR_ELx_SYS64_ISS_OP0_MASK 230 arch/arm64/include/asm/esr.h sys_reg((((e) & ESR_ELx_SYS64_ISS_OP0_MASK) >> \