AFMT_60958_1 1671 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c tmp = REG_SET_FIELD(tmp, AFMT_60958_1, AFMT_60958_CS_CHANNEL_NUMBER_R, 2); AFMT_60958_1 1713 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c tmp = REG_SET_FIELD(tmp, AFMT_60958_1, AFMT_60958_CS_CHANNEL_NUMBER_R, 2); AFMT_60958_1 1522 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c tmp = REG_SET_FIELD(tmp, AFMT_60958_1, AFMT_60958_CS_CHANNEL_NUMBER_R, 2); AFMT_60958_1 1429 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c REG_UPDATE(AFMT_60958_1, AFMT_60958_CS_CHANNEL_NUMBER_R, 2); AFMT_60958_1 65 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SRI(AFMT_60958_1, DIG, id), \ AFMT_60958_1 189 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(AFMT_60958_1, AFMT_60958_CS_CHANNEL_NUMBER_R, mask_sh),\ AFMT_60958_1 655 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h uint32_t AFMT_60958_1; AFMT_60958_1 1366 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c REG_UPDATE(AFMT_60958_1, AFMT_60958_CS_CHANNEL_NUMBER_R, 2); AFMT_60958_1 52 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SRI(AFMT_60958_1, DIG, id), \ AFMT_60958_1 121 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h uint32_t AFMT_60958_1; AFMT_60958_1 365 drivers/gpu/drm/radeon/evergreen_hdmi.c WREG32(AFMT_60958_1 + offset,