ESR_EL1 186 arch/arm64/include/asm/kvm_host.h #define c5_DFSR (ESR_EL1 * 2) /* Data Fault Status Register */ ESR_EL1 52 arch/arm64/kvm/hyp/sysreg-sr.c ctxt->sys_regs[ESR_EL1] = read_sysreg_el1(SYS_ESR); ESR_EL1 126 arch/arm64/kvm/hyp/sysreg-sr.c write_sysreg_el1(ctxt->sys_regs[ESR_EL1], SYS_ESR); ESR_EL1 146 arch/arm64/kvm/inject_fault.c vcpu_write_sys_reg(vcpu, esr | ESR_ELx_FSC_EXTABT, ESR_EL1); ESR_EL1 167 arch/arm64/kvm/inject_fault.c vcpu_write_sys_reg(vcpu, esr, ESR_EL1); ESR_EL1 90 arch/arm64/kvm/sys_regs.c case ESR_EL1: return read_sysreg_s(SYS_ESR_EL12); ESR_EL1 133 arch/arm64/kvm/sys_regs.c case ESR_EL1: write_sysreg_s(val, SYS_ESR_EL12); return; ESR_EL1 1501 arch/arm64/kvm/sys_regs.c { SYS_DESC(SYS_ESR_EL1), access_vm_reg, reset_unknown, ESR_EL1 },