EP93XX_SYSCON_I2SCLKDIV  123 arch/arm/mach-ep93xx/clock.c 	.enable_reg	= EP93XX_SYSCON_I2SCLKDIV,
EP93XX_SYSCON_I2SCLKDIV  131 arch/arm/mach-ep93xx/clock.c 	.enable_reg	= EP93XX_SYSCON_I2SCLKDIV,
EP93XX_SYSCON_I2SCLKDIV  139 arch/arm/mach-ep93xx/clock.c 	.enable_reg	= EP93XX_SYSCON_I2SCLKDIV,
EP93XX_SYSCON_I2SCLKDIV  685 arch/arm/mach-ep93xx/core.c 	val = __raw_readl(EP93XX_SYSCON_I2SCLKDIV);
EP93XX_SYSCON_I2SCLKDIV  688 arch/arm/mach-ep93xx/core.c 	ep93xx_syscon_swlocked_write(val, EP93XX_SYSCON_I2SCLKDIV);