EN0 206 arch/arm/mach-sa1100/simpad.c cs3_shadow = (EN1 | EN0 | LED2_ON | DISPLAY_ON | EN0 162 arch/mips/loongson64/loongson-3/smp.c (SMP_CORE_GROUP0_BASE + SMP_CORE0_OFFSET + EN0); EN0 164 arch/mips/loongson64/loongson-3/smp.c (SMP_CORE_GROUP0_BASE + SMP_CORE1_OFFSET + EN0); EN0 166 arch/mips/loongson64/loongson-3/smp.c (SMP_CORE_GROUP0_BASE + SMP_CORE2_OFFSET + EN0); EN0 168 arch/mips/loongson64/loongson-3/smp.c (SMP_CORE_GROUP0_BASE + SMP_CORE3_OFFSET + EN0); EN0 170 arch/mips/loongson64/loongson-3/smp.c (SMP_CORE_GROUP1_BASE + SMP_CORE0_OFFSET + EN0); EN0 172 arch/mips/loongson64/loongson-3/smp.c (SMP_CORE_GROUP1_BASE + SMP_CORE1_OFFSET + EN0); EN0 174 arch/mips/loongson64/loongson-3/smp.c (SMP_CORE_GROUP1_BASE + SMP_CORE2_OFFSET + EN0); EN0 176 arch/mips/loongson64/loongson-3/smp.c (SMP_CORE_GROUP1_BASE + SMP_CORE3_OFFSET + EN0); EN0 178 arch/mips/loongson64/loongson-3/smp.c (SMP_CORE_GROUP2_BASE + SMP_CORE0_OFFSET + EN0); EN0 180 arch/mips/loongson64/loongson-3/smp.c (SMP_CORE_GROUP2_BASE + SMP_CORE1_OFFSET + EN0); EN0 182 arch/mips/loongson64/loongson-3/smp.c (SMP_CORE_GROUP2_BASE + SMP_CORE2_OFFSET + EN0); EN0 184 arch/mips/loongson64/loongson-3/smp.c (SMP_CORE_GROUP2_BASE + SMP_CORE3_OFFSET + EN0); EN0 186 arch/mips/loongson64/loongson-3/smp.c (SMP_CORE_GROUP3_BASE + SMP_CORE0_OFFSET + EN0); EN0 188 arch/mips/loongson64/loongson-3/smp.c (SMP_CORE_GROUP3_BASE + SMP_CORE1_OFFSET + EN0); EN0 190 arch/mips/loongson64/loongson-3/smp.c (SMP_CORE_GROUP3_BASE + SMP_CORE2_OFFSET + EN0); EN0 192 arch/mips/loongson64/loongson-3/smp.c (SMP_CORE_GROUP3_BASE + SMP_CORE3_OFFSET + EN0); EN0 21 drivers/pcmcia/sa1100_simpad.c simpad_clear_cs3_bit(VCC_3V_EN|VCC_5V_EN|EN0|EN1); EN0 66 drivers/pcmcia/sa1100_simpad.c simpad_clear_cs3_bit(VCC_3V_EN|VCC_5V_EN|EN0|EN1); EN0 71 drivers/pcmcia/sa1100_simpad.c simpad_set_cs3_bit(VCC_5V_EN|EN0); EN0 76 drivers/pcmcia/sa1100_simpad.c simpad_set_cs3_bit(VCC_3V_EN|EN0); EN0 82 drivers/pcmcia/sa1100_simpad.c simpad_clear_cs3_bit(VCC_3V_EN|VCC_5V_EN|EN0|EN1);