EN               1780 drivers/dma/at_hdmac.c 	dma_writel(atdma, EN, 0);
EN               1945 drivers/dma/at_hdmac.c 	dma_writel(atdma, EN, AT_DMA_ENABLE);
EN               2122 drivers/dma/at_hdmac.c 	dma_writel(atdma, EN, AT_DMA_ENABLE);
EN               3398 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c 	WREG32_FIELD15(GC, 0, CP_PQ_WPTR_POLL_CNTL, EN, 0);
EN               3059 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c 	tmp = REG_SET_FIELD(tmp, CP_PQ_WPTR_POLL_CNTL, EN, 0);
EN               4610 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c 	WREG32_FIELD(CP_PQ_WPTR_POLL_CNTL, EN, 0);
EN               3559 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c 	WREG32_FIELD15(GC, 0, CP_PQ_WPTR_POLL_CNTL, EN, 0);
EN               3960 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c 		WREG32_FIELD15(GC, 0, CP_PQ_WPTR_POLL_CNTL, EN, 0);
EN                 43 drivers/gpu/drm/amd/display/dc/gpio/ddc_regs.h 	DDC_GPIO_REG_LIST_ENTRY(EN,cd,id),\
EN                 68 drivers/gpu/drm/amd/display/dc/gpio/ddc_regs.h 	DDC_GPIO_VGA_REG_LIST_ENTRY(EN,cd),\
EN                 85 drivers/gpu/drm/amd/display/dc/gpio/ddc_regs.h 	DDC_GPIO_I2C_REG_LIST_ENTRY(EN,cd),\
EN                 40 drivers/gpu/drm/amd/display/dc/gpio/generic_regs.h 	GENERIC_GPIO_REG_LIST_ENTRY(EN, cd, id),\
EN                 48 drivers/gpu/drm/amd/display/dc/gpio/hpd_regs.h 	HPD_GPIO_REG_LIST_ENTRY(EN,cd,id),\
EN                 47 drivers/gpu/drm/amd/display/dc/gpio/hw_gpio.c 	REG_GET(EN_reg, EN, &gpio->store.en);
EN                 56 drivers/gpu/drm/amd/display/dc/gpio/hw_gpio.c 	REG_UPDATE(EN_reg, EN, gpio->store.en);
EN                114 drivers/gpu/drm/amd/display/dc/gpio/hw_gpio.c 		REG_UPDATE(EN_reg, EN, ~value);
EN                151 drivers/gpu/drm/amd/display/dc/gpio/hw_gpio.c 		REG_UPDATE(EN_reg, EN, 0);
EN                131 drivers/gpu/drm/mediatek/mtk_dpi.c 	mtk_dpi_mask(dpi, DPI_EN, EN, EN);
EN                136 drivers/gpu/drm/mediatek/mtk_dpi.c 	mtk_dpi_mask(dpi, DPI_EN, 0, EN);
EN                764 drivers/gpu/drm/radeon/trinity_dpm.c 	WREG32_P(CG_CG_VOLTAGE_CNTL, 0, ~EN);
EN                794 drivers/gpu/drm/radeon/trinity_dpm.c 	WREG32_P(CG_CG_VOLTAGE_CNTL, EN, ~EN);
EN                 40 drivers/hwmon/as370-hwmon.c 	val |= EN;
EN                149 drivers/net/ethernet/amd/xgbe/xgbe-i2c.c 	XI2C_IOWRITE_BITS(pdata, IC_ENABLE, EN, 1);
EN                170 drivers/net/ethernet/amd/xgbe/xgbe-i2c.c 		XI2C_IOWRITE_BITS(pdata, IC_ENABLE, EN, mode);
EN                171 drivers/net/ethernet/amd/xgbe/xgbe-i2c.c 		if (XI2C_IOREAD_BITS(pdata, IC_ENABLE_STATUS, EN) == mode)
EN                117 drivers/net/ethernet/huawei/hinic/hinic_hw_qp.c 			    HINIC_SQ_CTXT_CEQ_ATTR_SET(0, EN);
EN                172 drivers/net/ethernet/huawei/hinic/hinic_hw_qp.c 	rq_ctxt->ceq_attr = HINIC_RQ_CTXT_CEQ_ATTR_SET(0, EN) |
EN                235 drivers/net/ethernet/stmicro/stmmac/dwmac-sti.c 		regmap_update_bits(regmap, reg, EN_MASK, EN);
EN                 67 drivers/regulator/mc13xxx.h 		.enable_bit = prefix ## _reg ## _ ## _name ## EN,	\
EN                 85 drivers/regulator/mc13xxx.h 		.enable_bit = prefix ## _reg ## _ ## _name ## EN,	\
EN                100 drivers/regulator/mc13xxx.h 		.enable_bit = prefix ## _reg ## _ ## _name ## EN,	\
EN                 71 drivers/staging/media/omap4iss/iss_resizer.c 	RZA_PRINT_REGISTER(iss, EN);
EN                 74 drivers/thermal/qcom/tsens-8960.c 		mask = SLP_CLK_ENA | EN;
EN                 76 drivers/thermal/qcom/tsens-8960.c 		mask = SLP_CLK_ENA_8660 | EN;
EN                130 drivers/thermal/qcom/tsens-8960.c 		reg |= mask | SLP_CLK_ENA | EN;
EN                132 drivers/thermal/qcom/tsens-8960.c 		reg |= mask | SLP_CLK_ENA_8660 | EN;
EN                149 drivers/thermal/qcom/tsens-8960.c 	mask |= EN;
EN                207 drivers/thermal/qcom/tsens-8960.c 	reg_cntl |= EN;
EN                565 sound/soc/sh/rcar/ssi.c 	ssi->cr_en = EN;