EFFECTIVE_L1_TLB_SIZE 2419 drivers/gpu/drm/radeon/evergreen.c 		EFFECTIVE_L1_TLB_SIZE(5) | EFFECTIVE_L1_QUEUE_SIZE(5);
EFFECTIVE_L1_TLB_SIZE 2469 drivers/gpu/drm/radeon/evergreen.c 	tmp = EFFECTIVE_L1_TLB_SIZE(5) | EFFECTIVE_L1_QUEUE_SIZE(5);
EFFECTIVE_L1_TLB_SIZE 2502 drivers/gpu/drm/radeon/evergreen.c 		EFFECTIVE_L1_TLB_SIZE(5) | EFFECTIVE_L1_QUEUE_SIZE(5);
EFFECTIVE_L1_TLB_SIZE 1151 drivers/gpu/drm/radeon/r600.c 		EFFECTIVE_L1_TLB_SIZE(5) | EFFECTIVE_L1_QUEUE_SIZE(5) |
EFFECTIVE_L1_TLB_SIZE 1201 drivers/gpu/drm/radeon/r600.c 	tmp = EFFECTIVE_L1_TLB_SIZE(5) | EFFECTIVE_L1_QUEUE_SIZE(5) |
EFFECTIVE_L1_TLB_SIZE 1243 drivers/gpu/drm/radeon/r600.c 		EFFECTIVE_L1_TLB_SIZE(5) | EFFECTIVE_L1_QUEUE_SIZE(5) |
EFFECTIVE_L1_TLB_SIZE  919 drivers/gpu/drm/radeon/rv770.c 		EFFECTIVE_L1_TLB_SIZE(5) | EFFECTIVE_L1_QUEUE_SIZE(5);
EFFECTIVE_L1_TLB_SIZE  962 drivers/gpu/drm/radeon/rv770.c 	tmp = EFFECTIVE_L1_TLB_SIZE(5) | EFFECTIVE_L1_QUEUE_SIZE(5);
EFFECTIVE_L1_TLB_SIZE  996 drivers/gpu/drm/radeon/rv770.c 		EFFECTIVE_L1_TLB_SIZE(5) | EFFECTIVE_L1_QUEUE_SIZE(5);