EDP_PSR_CTL       494 drivers/gpu/drm/i915/display/intel_psr.c 	val |= I915_READ(EDP_PSR_CTL) & EDP_PSR_RESTORE_PSR_ACTIVE_CTX_MASK;
EDP_PSR_CTL       495 drivers/gpu/drm/i915/display/intel_psr.c 	I915_WRITE(EDP_PSR_CTL, val);
EDP_PSR_CTL       531 drivers/gpu/drm/i915/display/intel_psr.c 	I915_WRITE(EDP_PSR_CTL, 0);
EDP_PSR_CTL       653 drivers/gpu/drm/i915/display/intel_psr.c 	WARN_ON(I915_READ(EDP_PSR_CTL) & EDP_PSR_ENABLE);
EDP_PSR_CTL       787 drivers/gpu/drm/i915/display/intel_psr.c 		WARN_ON(I915_READ(EDP_PSR_CTL) & EDP_PSR_ENABLE);
EDP_PSR_CTL       796 drivers/gpu/drm/i915/display/intel_psr.c 		val = I915_READ(EDP_PSR_CTL);
EDP_PSR_CTL       798 drivers/gpu/drm/i915/display/intel_psr.c 		I915_WRITE(EDP_PSR_CTL, val & ~EDP_PSR_ENABLE);
EDP_PSR_CTL      2198 drivers/gpu/drm/i915/i915_debugfs.c 		val = I915_READ(EDP_PSR_CTL);